AMD-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Timur Kristóf" <timur.kristof@gmail.com>
To: amd-gfx@lists.freedesktop.org,
	Alex Deucher <alexander.deucher@amd.com>,
	christian.koenig@amd.com, Natalie Vock <natalie.vock@gmx.de>,
	John Olender <john.olender@gmail.com>, Liu Leo <Leo.Liu@amd.com>
Cc: "Timur Kristóf" <timur.kristof@gmail.com>
Subject: [PATCH 5/5] drm/amdgpu/uvd: Move BOs to GTT when we can't place them in VRAM correctly
Date: Tue, 19 May 2026 10:22:04 +0200	[thread overview]
Message-ID: <20260519082204.60811-6-timur.kristof@gmail.com> (raw)
In-Reply-To: <20260519082204.60811-1-timur.kristof@gmail.com>

When VRAM is nearly full, the Buddy allocator makes tradeoffs
and it may place BOs in a way that they cross 256M segments.

Move the BO to GTT when this eventuality is detected.

Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/4800
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c |  3 ++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 21 +++++++++++++++++++++
 2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index a106c7e77e26..fb49bd53bd00 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -977,6 +977,7 @@ u32 amdgpu_ttm_fill_gart_256M_placements(struct ttm_buffer_object *bo,
 					 u32 max_placements)
 {
 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
+	const u64 sz = adev->gmc.gart_size;
 	u32 i;
 
 	/* Fill the placements array with 256M segments, starting from highest. */
@@ -984,7 +985,7 @@ u32 amdgpu_ttm_fill_gart_256M_placements(struct ttm_buffer_object *bo,
 		if (i * SZ_256M >= adev->gmc.gart_size)
 			break;
 
-		placements[i].lpfn = (adev->gmc.gart_size - i * SZ_256M) >> PAGE_SHIFT;
+		placements[i].lpfn = MIN(ALIGN(sz, SZ_256M) - i * SZ_256M, sz) >> PAGE_SHIFT;
 		placements[i].fpfn = ALIGN_DOWN(placements[i].lpfn - 1, SZ_256M >> PAGE_SHIFT);
 		placements[i].mem_type = TTM_PL_TT;
 		placements[i].flags = bo->resource->placement;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 993957927782..53f810c2a5fb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -617,6 +617,27 @@ static int amdgpu_uvd_cs_pass1(struct amdgpu_uvd_cs_ctx *ctx)
 			amdgpu_uvd_force_into_uvd_segment(bo);
 
 		r = ttm_bo_validate(&bo->tbo, &bo->placement, &tctx);
+		if (r)
+			return r;
+
+		/* Check if the BO placement crosses a 256M segment. */
+		if ((amdgpu_bo_gpu_offset(bo) >> 28) !=
+		    ((amdgpu_bo_gpu_offset(bo) + amdgpu_bo_size(bo)) >> 28)) {
+			/* There is not enough memory for correct placement of FB/MSG BOs. */
+			if (cmd == 0x0 || cmd == 0x3)
+				return -ENOMEM;
+
+			/* GTT->GTT moves are not implemented yet. */
+			if (bo->tbo.resource->mem_type != TTM_PL_VRAM)
+				return -ENOMEM;
+
+			/* Try to move the BO from VRAM to GART into a 256M segment. */
+			amdgpu_ttm_fill_gart_256M_placements(&bo->tbo,
+							     bo->placements,
+							     ARRAY_SIZE(bo->placements));
+
+			r = ttm_bo_validate(&bo->tbo, &bo->placement, &tctx);
+		}
 	}
 
 	return r;
-- 
2.54.0


      parent reply	other threads:[~2026-05-19  8:22 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-19  8:21 [PATCH 0/5] drm/amdgpu/uvd: Fix UVD BO memory placement issues Timur Kristóf
2026-05-19  8:22 ` [PATCH 1/5] drm/amdgpu: Respect placement requirements in amdgpu_gtt_mgr functions Timur Kristóf
2026-05-19  8:52   ` Christian König
2026-05-19  8:22 ` [PATCH 2/5] drm/amdgpu: Use placements of 256M GART segments for SI/CIK Timur Kristóf
2026-05-19  8:54   ` Christian König
2026-05-19  8:59     ` Timur Kristóf
2026-05-19  9:01       ` Christian König
2026-05-19  9:16         ` Timur Kristóf
2026-05-19  8:22 ` [PATCH 3/5] drm/amdgpu/uvd: Place VCPU BO only in VRAM for UVD 4.x and older Timur Kristóf
2026-05-19  8:56   ` Christian König
2026-05-19  8:22 ` [PATCH 4/5] drm/amdgpu/uvd: Fix forcing BOs into UVD segment when it isn't at 0 Timur Kristóf
2026-05-19  9:06   ` Christian König
2026-05-19  9:32     ` Timur Kristóf
2026-05-19  8:22 ` Timur Kristóf [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260519082204.60811-6-timur.kristof@gmail.com \
    --to=timur.kristof@gmail.com \
    --cc=Leo.Liu@amd.com \
    --cc=alexander.deucher@amd.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=christian.koenig@amd.com \
    --cc=john.olender@gmail.com \
    --cc=natalie.vock@gmx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox