From: "Timur Kristóf" <timur.kristof@gmail.com>
To: amd-gfx@lists.freedesktop.org,
Alex Deucher <alexander.deucher@amd.com>,
christian.koenig@amd.com, Natalie Vock <natalie.vock@gmx.de>,
Melissa Wen <mwen@igalia.com>,
Harry Wentland <Harry.Wentland@amd.com>,
Alex Hung <alex.hung@amd.com>, Roman Li <Roman.Li@amd.com>,
Leo Li <sunpeng.li@amd.com>,
Mario Limonciello <mario.limonciello@amd.com>
Cc: "Timur Kristóf" <timur.kristof@gmail.com>
Subject: [PATCH 01/14] drm/amd/display: Delete unimplemented dm_pp_apply_power_level_change_request() (v2)
Date: Tue, 19 May 2026 12:21:05 +0200 [thread overview]
Message-ID: <20260519102118.246466-2-timur.kristof@gmail.com> (raw)
In-Reply-To: <20260519102118.246466-1-timur.kristof@gmail.com>
dm_pp_apply_power_level_change_request() was called from old
DCE clock manager implementations on DCE6, 8, 10, 11.2
but has not been implemented ever since the beginning of DC.
Affected GPUs have been working fine without that implementation
for many years. Let's delete it now.
v2:
- Delete dm_pp_apply_power_level_change_request too
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Melissa Wen <mwen@igalia.com>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 8 --------
.../gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c | 9 ---------
.../drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c | 9 ---------
.../drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c | 9 ---------
drivers/gpu/drm/amd/display/dc/dm_services.h | 4 ----
drivers/gpu/drm/amd/display/dc/dm_services_types.h | 4 ----
6 files changed, 43 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index 11b2ea6edf95..17f42201ab86 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
@@ -417,14 +417,6 @@ bool dm_pp_notify_wm_clock_changes(
return false;
}
-bool dm_pp_apply_power_level_change_request(
- const struct dc_context *ctx,
- struct dm_pp_power_level_change_request *level_change_req)
-{
- /* TODO: to be implemented */
- return false;
-}
-
bool dm_pp_apply_clock_for_voltage_request(
const struct dc_context *ctx,
struct dm_pp_clock_for_voltage_req *clock_for_voltage_req)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c
index 808e24f0e88f..4ccc6c742d00 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c
@@ -431,19 +431,10 @@ static void dce_update_clocks(struct clk_mgr *clk_mgr_base,
bool safe_to_lower)
{
struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base);
- struct dm_pp_power_level_change_request level_change_req;
const int max_disp_clk =
clk_mgr_dce->max_clks_by_state[DM_PP_CLOCKS_STATE_PERFORMANCE].display_clk_khz;
int patched_disp_clk = MIN(max_disp_clk, context->bw_ctx.bw.dce.dispclk_khz);
- level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context);
- /* get max clock state from PPLIB */
- if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower)
- || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) {
- if (dm_pp_apply_power_level_change_request(clk_mgr_base->ctx, &level_change_req))
- clk_mgr_dce->cur_min_clks_state = level_change_req.power_level;
- }
-
if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) {
patched_disp_clk = dce_set_clock(clk_mgr_base, patched_disp_clk);
clk_mgr_base->clks.dispclk_khz = patched_disp_clk;
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c
index b35a44976477..d3cd542063db 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c
@@ -257,21 +257,12 @@ static void dce11_update_clocks(struct clk_mgr *clk_mgr_base,
bool safe_to_lower)
{
struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base);
- struct dm_pp_power_level_change_request level_change_req;
int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz;
/*TODO: W/A for dal3 linux, investigate why this works */
if (!clk_mgr_dce->dfs_bypass_active)
patched_disp_clk = patched_disp_clk * 115 / 100;
- level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context);
- /* get max clock state from PPLIB */
- if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower)
- || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) {
- if (dm_pp_apply_power_level_change_request(clk_mgr_base->ctx, &level_change_req))
- clk_mgr_dce->cur_min_clks_state = level_change_req.power_level;
- }
-
if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) {
context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr_base, patched_disp_clk);
clk_mgr_base->clks.dispclk_khz = patched_disp_clk;
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c
index 1f36ad8a7de4..48393c69735b 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c
@@ -193,21 +193,12 @@ static void dce112_update_clocks(struct clk_mgr *clk_mgr_base,
bool safe_to_lower)
{
struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base);
- struct dm_pp_power_level_change_request level_change_req;
int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz;
/*TODO: W/A for dal3 linux, investigate why this works */
if (!clk_mgr_dce->dfs_bypass_active)
patched_disp_clk = patched_disp_clk * 115 / 100;
- level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context);
- /* get max clock state from PPLIB */
- if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower)
- || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) {
- if (dm_pp_apply_power_level_change_request(clk_mgr_base->ctx, &level_change_req))
- clk_mgr_dce->cur_min_clks_state = level_change_req.power_level;
- }
-
if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) {
patched_disp_clk = dce112_set_clock(clk_mgr_base, patched_disp_clk);
clk_mgr_base->clks.dispclk_khz = patched_disp_clk;
diff --git a/drivers/gpu/drm/amd/display/dc/dm_services.h b/drivers/gpu/drm/amd/display/dc/dm_services.h
index fbbf9c757b3c..1395d36bfabe 100644
--- a/drivers/gpu/drm/amd/display/dc/dm_services.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_services.h
@@ -224,10 +224,6 @@ bool dm_pp_apply_display_requirements(
const struct dc_context *ctx,
const struct dm_pp_display_configuration *pp_display_cfg);
-bool dm_pp_apply_power_level_change_request(
- const struct dc_context *ctx,
- struct dm_pp_power_level_change_request *level_change_req);
-
bool dm_pp_apply_clock_for_voltage_request(
const struct dc_context *ctx,
struct dm_pp_clock_for_voltage_req *clock_for_voltage_req);
diff --git a/drivers/gpu/drm/amd/display/dc/dm_services_types.h b/drivers/gpu/drm/amd/display/dc/dm_services_types.h
index 3b093b8699ab..cae3ed6056d6 100644
--- a/drivers/gpu/drm/amd/display/dc/dm_services_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_services_types.h
@@ -246,10 +246,6 @@ enum dm_acpi_display_type {
AcpiDisplayType_DFP6 = 12
};
-struct dm_pp_power_level_change_request {
- enum dm_pp_clocks_state power_level;
-};
-
struct dm_pp_clock_for_voltage_req {
enum dm_pp_clock_type clk_type;
uint32_t clocks_in_khz;
--
2.54.0
next prev parent reply other threads:[~2026-05-19 10:21 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-19 10:21 [PATCH 00/14] drm/amd: Delete defunct DAL power level code Timur Kristóf
2026-05-19 10:21 ` Timur Kristóf [this message]
2026-05-19 10:21 ` [PATCH 02/14] drm/amd/display: Delete dce_get_required_clocks_state() Timur Kristóf
2026-05-19 10:21 ` [PATCH 03/14] drm/amd/display: Remove min/max clock levels from clk_mgr (v2) Timur Kristóf
2026-05-19 10:21 ` [PATCH 04/14] drm/amd/display: Delete max_clocks_state Timur Kristóf
2026-05-19 10:21 ` [PATCH 05/14] drm/amd/display: Set max supported display clock without max_clks_by_state (v2) Timur Kristóf
2026-05-19 10:21 ` [PATCH 06/14] drm/amd/display: Delete max_clks_by_state from DCE clock manager (v2) Timur Kristóf
2026-05-19 10:21 ` [PATCH 07/14] drm/amd/display: Delete disp_clk_voltage from integrated info (v2) Timur Kristóf
2026-05-19 10:21 ` [PATCH 08/14] drm/amd/display: Delete dm_pp_clocks_state Timur Kristóf
2026-05-19 10:21 ` [PATCH 09/14] drm/amd/pm: Delete unused get_display_power_level() function Timur Kristóf
2026-05-19 10:21 ` [PATCH 10/14] drm/amd/pm: Delete dummy get_dal_power_level implementations Timur Kristóf
2026-05-19 10:21 ` [PATCH 11/14] drm/amd/pm: Delete non-functional SMU8 get_dal_power_level implementation Timur Kristóf
2026-05-19 10:21 ` [PATCH 12/14] drm/amd/pm: Delete vddc_dep_on_dal_pwrl Timur Kristóf
2026-05-19 10:21 ` [PATCH 13/14] drm/amd/pm: Delete get_dal_power_level Timur Kristóf
2026-05-19 10:21 ` [PATCH 14/14] drm/amd/pm: Delete PP_DAL_POWERLEVEL Timur Kristóf
2026-05-19 12:57 ` [PATCH 00/14] drm/amd: Delete defunct DAL power level code Christian König
2026-05-19 14:54 ` Alex Deucher
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260519102118.246466-2-timur.kristof@gmail.com \
--to=timur.kristof@gmail.com \
--cc=Harry.Wentland@amd.com \
--cc=Roman.Li@amd.com \
--cc=alex.hung@amd.com \
--cc=alexander.deucher@amd.com \
--cc=amd-gfx@lists.freedesktop.org \
--cc=christian.koenig@amd.com \
--cc=mario.limonciello@amd.com \
--cc=mwen@igalia.com \
--cc=natalie.vock@gmx.de \
--cc=sunpeng.li@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox