[PATCH 1/2] drm/amdgpu: Switch order of GC and Display IP blocks

[Matthew Stewart <Matthew.Stewart2@amd.com>]

For DCN42B, GC hardware init should occur before display HW init.
Otherwise, the GB_ADDR_CONFIG register accessed in
amdgpu_dm_plane_add_gfx11_modifiers will have a value of 0, causing
plane modifiers to not be set correctly.

Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 44e7d2e3e6df..76b6efc8768b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -3657,11 +3657,11 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
 			return r;
 	}
 
-	r = amdgpu_discovery_set_display_ip_blocks(adev);
+	r = amdgpu_discovery_set_gc_ip_blocks(adev);
 	if (r)
 		return r;
 
-	r = amdgpu_discovery_set_gc_ip_blocks(adev);
+	r = amdgpu_discovery_set_display_ip_blocks(adev);
 	if (r)
 		return r;
 
-- 
2.55.0