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Ip=[165.204.84.17]; Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EDD7.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6345 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Mukul Joshi remote->active_accel_bits aliased info->vpod.active_accel_bits, which psp_ual_query_info() refreshes on every commit. Teardown (peer_remote_fini / gart unmap) then iterated the new set instead of the one sw_init mapped, orphaning drm_mm nodes in the shared GTT manager. Make active_accel_bits an owned snapshot copied at sw_init time. Drop the now-redundant not-initialised guard in metadata_npa_unmapping(), since the earlier remote->ring_bo NULL-check already covers that case. Signed-off-by: Mukul Joshi Reviewed-by: Philip Yang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c index a70327383f5a2..8486d7b3dbe66 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c @@ -3842,8 +3842,14 @@ struct amdgpu_ualink_remote { /* address alias mode alloc npa address for shared wb */ struct drm_mm_node rptr_mm_node; - /* active accelator id bitmap of the pod */ - unsigned long *active_accel_bits; + /* + * Owned snapshot of the vPod's active accelerator bitmap, taken at + * sw_init time. Must NOT alias info->vpod.active_accel_bits, which + * psp_ual_query_info() refreshes on every commit: aliasing it would let + * teardown unmap a different set than setup mapped, leaking drm_mm nodes + * in the shared GTT manager. + */ + DECLARE_BITMAP(active_accel_bits, AMDGPU_UALINK_ACCEL_MAX); u32 num_accel; /* remote GPUs ring buffer, read, write pointer local copy and gart mapping */ @@ -4221,8 +4227,6 @@ static void amdgpu_ualink_metadata_npa_unmapping(struct amdgpu_device *adev) if (!remote->ring_bo) return; - if (!remote->active_accel_bits) - return; rb_size = AMDGPU_UALINK_RB_SIZE; rb_size_in_pages = rb_size >> AMDGPU_GPU_PAGE_SHIFT; @@ -4641,7 +4645,9 @@ static int amdgpu_ualink_metadata_init(struct amdgpu_device *adev) u32 status, accel_id; int r; - remote->active_accel_bits = adev->ualink.info->vpod.active_accel_bits; + bitmap_copy(remote->active_accel_bits, + adev->ualink.info->vpod.active_accel_bits, + AMDGPU_UALINK_ACCEL_MAX); dev_dbg(adev->dev, "%d active accelerators config in vpod\n", bitmap_weight(remote->active_accel_bits, AMDGPU_UALINK_ACCEL_MAX)); -- 2.55.0