From: "Timur Kristóf" <timur.kristof@gmail.com>
To: amd-gfx@lists.freedesktop.org, Alexander.Deucher@amd.com,
"Christian König" <christian.koenig@amd.com>,
"Natalie Vock" <natalie.vock@gmx.de>,
"Amir Shetaia" <Amir.Shetaia@amd.com>,
"Marek Olšák" <maraeo@gmail.com>,
"Mario Limonciello" <mario.limonciello@amd.com>,
"Tvrtko Ursulin" <tursulin@ursulin.net>,
"Felix Kuehling" <Felix.Kuehling@amd.com>,
"Lijo Lazar" <lijo.lazar@amd.com>, "Siwei He" <siwei.he@amd.com>,
"Philip Yang" <philip.yang@amd.com>,
"Mukul Joshi" <mukul.joshi@amd.com>
Cc: "Timur Kristóf" <timur.kristof@gmail.com>,
"Tvrtko Ursulin" <tvrtko.ursulin@igalia.com>
Subject: [PATCH 03/11] drm/amdgpu/ih: Don't perturb HW registers when accessing soft IH ring
Date: Fri, 28 Aug 2026 13:41:05 +0200 [thread overview]
Message-ID: <20260828114113.13523-4-timur.kristof@gmail.com> (raw)
In-Reply-To: <20260828114113.13523-1-timur.kristof@gmail.com>
The soft IH ring is implemented entirely in software.
We shouldn't read (or write) any HW registers when accessing it.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
---
drivers/gpu/drm/amd/amdgpu/ih_v6_0.c | 7 +++++++
drivers/gpu/drm/amd/amdgpu/ih_v6_1.c | 7 +++++++
drivers/gpu/drm/amd/amdgpu/ih_v7_0.c | 7 +++++++
drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 4 ++++
4 files changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c b/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c
index 512c76d97840..4470df45b7ea 100644
--- a/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c
@@ -439,6 +439,10 @@ static u32 ih_v6_0_get_wptr(struct amdgpu_device *adev,
struct amdgpu_ih_regs *ih_regs;
wptr = le32_to_cpu(*ih->wptr_cpu);
+
+ if (ih == &adev->irq.ih_soft)
+ goto out;
+
ih_regs = &ih->ih_regs;
if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))
@@ -514,6 +518,9 @@ static void ih_v6_0_set_rptr(struct amdgpu_device *adev,
{
struct amdgpu_ih_regs *ih_regs;
+ if (ih == &adev->irq.ih_soft)
+ return;
+
if (ih->use_doorbell) {
/* XXX check if swapping is necessary on BE */
*ih->rptr_cpu = ih->rptr;
diff --git a/drivers/gpu/drm/amd/amdgpu/ih_v6_1.c b/drivers/gpu/drm/amd/amdgpu/ih_v6_1.c
index bae86e5fa316..6bbf89d048e7 100644
--- a/drivers/gpu/drm/amd/amdgpu/ih_v6_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/ih_v6_1.c
@@ -410,6 +410,10 @@ static u32 ih_v6_1_get_wptr(struct amdgpu_device *adev,
struct amdgpu_ih_regs *ih_regs;
wptr = le32_to_cpu(*ih->wptr_cpu);
+
+ if (ih == &adev->irq.ih_soft)
+ goto out;
+
ih_regs = &ih->ih_regs;
if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))
@@ -481,6 +485,9 @@ static void ih_v6_1_irq_rearm(struct amdgpu_device *adev,
static void ih_v6_1_set_rptr(struct amdgpu_device *adev,
struct amdgpu_ih_ring *ih)
{
+ if (ih == &adev->irq.ih_soft)
+ return;
+
struct amdgpu_ih_regs *ih_regs;
if (ih->use_doorbell) {
diff --git a/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c b/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c
index 6265ee4b0ff1..f271bc8c4859 100644
--- a/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c
@@ -460,6 +460,10 @@ static u32 ih_v7_0_get_wptr(struct amdgpu_device *adev,
struct amdgpu_ih_regs *ih_regs;
wptr = le32_to_cpu(*ih->wptr_cpu);
+
+ if (ih == &adev->irq.ih_soft)
+ goto out;
+
ih_regs = &ih->ih_regs;
if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))
@@ -530,6 +534,9 @@ static void ih_v7_0_set_rptr(struct amdgpu_device *adev,
{
struct amdgpu_ih_regs *ih_regs;
+ if (ih == &adev->irq.ih_soft)
+ return;
+
if (ih->use_doorbell) {
/* XXX check if swapping is necessary on BE */
*ih->rptr_cpu = ih->rptr;
diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
index 7a167ad93fd0..1dae7df9ee17 100644
--- a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
@@ -417,6 +417,10 @@ static u32 navi10_ih_get_wptr(struct amdgpu_device *adev,
*/
wptr = le32_to_cpu(*ih->wptr_cpu);
+ if (ih == &adev->irq.ih_soft)
+ goto out;
+
+
if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))
goto out;
}
--
2.55.0
next prev parent reply other threads:[~2026-08-28 11:41 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-28 11:41 [PATCH 00/11] drm/amdgpu: Improve retry fault handling (v4) Timur Kristóf
2026-08-28 11:41 ` [PATCH 01/11] drm/amdgpu: Respect noretry flag for retry faults on GFX12.1 Timur Kristóf
2026-08-28 15:47 ` Alex Deucher
2026-08-28 11:41 ` [PATCH 02/11] drm/amdgpu/gfxhub: Enable retry fault interrupts in L2_PROTECTION_FAULT_CNTL2 Timur Kristóf
2026-08-28 11:41 ` Timur Kristóf [this message]
2026-08-28 11:41 ` [PATCH 04/11] drm/amdgpu/ih6.1: Use IH_SW_RING_SIZE for soft IH ring instead of PAGE_SIZE Timur Kristóf
2026-08-28 11:41 ` [PATCH 05/11] drm/amdgpu/ih7.0: " Timur Kristóf
2026-08-28 11:41 ` [PATCH 06/11] drm/amdgpu/gmc11: Pass cam_index to retry fault handler Timur Kristóf
2026-08-28 11:41 ` [PATCH 07/11] drm/amdgpu/gmc12: " Timur Kristóf
2026-08-28 11:41 ` [PATCH 08/11] drm/amdgpu/gmc12: Use AMDGPU_PTE_IS_PTE flag for init_pte_flags on GFX12.0 Timur Kristóf
2026-08-28 11:41 ` [PATCH 09/11] drm/amdgpu/vm: Use init PTE flags in amdgpu_vm_handle_fault() Timur Kristóf
2026-08-28 11:41 ` [PATCH 10/11] drm/amdgpu/ih6.0: Enable retry CAM on Navi 3 dGPUs Timur Kristóf
2026-08-28 11:41 ` [PATCH 11/11] drm/amdgpu/ih7.0: Enable retry CAM on Navi 4 dGPUs Timur Kristóf
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