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Thu, 3 Sep 2026 04:44:39 -0500 From: Jesse Zhang To: CC: , Christian Koenig , Jesse Zhang Subject: [PATCH 1/4] drm/amdgpu/sdma: add detect_hung_queue callback Date: Thu, 3 Sep 2026 17:42:03 +0800 Message-ID: <20260903094438.3880682-1-Jesse.Zhang@amd.com> X-Mailer: git-send-email 2.49.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00006003:EE_|CH3PR12MB9123:EE_ X-MS-Office365-Filtering-Correlation-Id: 0a5d67d3-6fcc-4a50-65ae-08df099ffa1f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|23010399003|36860700016|376014|1800799024|56012099006|10067099003|11063799006|18002099003; X-Microsoft-Antispam-Message-Info: tLRNh5CvyZXt1x67QL+NcAqA3tHZsVE2W/QJ3tkwnAj+Z6joS/xpxxh4XyGFA1Kw9A++1BAtk5PNZSQEatoBvd0/V8bLklLq/PlkfcKFa+pziruwY5iepnMSMJ42Y0Ma0M03RBvc+iu7PpBhdXJRFD2H3cqF1RiO0j2xlLPpQkLxrspH1ao5wSNxkzrMJDgx01WcV0FyMTZ8WF01at34OeiiSkYisJ+6D5z3GR6oZ19bkOyYrMnb+6whFd+vuRo/EcaJhOyo67Xw1K+6qxn289HA1eSwG7D7GhP5xb7WAKTRiCerj7uRF+YZ2N68o67LNhznTyPmaXJLotuvbOQ32No8vyOivRT6aem/ur/WyYG3994zH4Q4UbRCkun7xO72oGqzy7G6syKP2Nq+JtLGSenvkF+Z506QE7aNEgWT7k763eA74aQ+BIkXQ2GJ1uj19rnkm/nUIMUAa1kaX+wypR+shO6R7ZXLXl3I5n3qFZG6JyqyDqrTfSpkgUN/jd4U14g88THLu9FUTK32G7J04baD5WBKI5C1A3YZpIV9TppAf1JtQNbVmfX+EczpaX1MzvRNIRvd7EaMFMWjJ4utKZtQuT6nysBcJ/vnpdr7TLwBsA94WyJj9q3z9KtJotAJjen8bIVQ4cXLii3NsA26ZMccKN3xm7KDxs/xVZz1LNIP/C9zXZ4Lr8BKeBsLPAeBIla2E7Sqf0+ZUjASylmT5g== X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00006003.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB9123 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Add an optional per-IP callback that maps a user queue's doorbell index to its HW slot (instance, queue_id). It is needed to reset a hung SDMA user queue over MMIO, since struct amdgpu_usermode_queue does not store its HW slot. Signed-off-by: Jesse Zhang --- drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h index 671cfbb67b7a..659836c2c377 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h @@ -59,6 +59,8 @@ struct amdgpu_sdma_funcs { int (*stop_kernel_queue)(struct amdgpu_ring *ring); int (*start_kernel_queue)(struct amdgpu_ring *ring); int (*soft_reset_kernel_queue)(struct amdgpu_device *adev, u32 instance_id); + bool (*detect_hung_queue)(struct amdgpu_device *adev, u32 doorbell_index, + u32 *instance_id, u32 *queue_id); }; struct amdgpu_sdma_instance { -- 2.49.0