From: Jesse Zhang <Jesse.Zhang@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Alexander.Deucher@amd.com>,
Christian Koenig <christian.koenig@amd.com>,
Jesse Zhang <Jesse.Zhang@amd.com>
Subject: [PATCH 3/4] drm/amdgpu/sdma7: implement detect_hung_queue
Date: Thu, 3 Sep 2026 17:42:05 +0800 [thread overview]
Message-ID: <20260903094438.3880682-3-Jesse.Zhang@amd.com> (raw)
In-Reply-To: <20260903094438.3880682-1-Jesse.Zhang@amd.com>
Match each SDMA queue's DOORBELL_OFFSET register against the given
doorbell to recover its (instance, queue_id) HW slot. The per-queue
register stride is derived from the named QUEUE0/QUEUE1 registers.
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 33 ++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
index d5552f206e4d..c55c941b82cf 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
@@ -784,6 +784,34 @@ static int sdma_v7_0_soft_reset(struct amdgpu_ip_block *ip_block)
return sdma_v7_0_start(adev);
}
+/* dword stride between adjacent per-queue register banks */
+#define SDMA_V7_0_QUEUE_REG_STRIDE \
+ (regSDMA0_QUEUE1_RB_CNTL - regSDMA0_QUEUE0_RB_CNTL)
+
+/* find the HW slot (instance, queue_id) whose doorbell matches doorbell_index */
+static bool sdma_v7_0_detect_hung_queue(struct amdgpu_device *adev,
+ u32 doorbell_index,
+ u32 *instance_id, u32 *queue_id)
+{
+ u32 i, q, reg, dboff;
+
+ for (i = 0; i < adev->sdma.num_instances; i++) {
+ for (q = 0; q < 8; q++) {
+ reg = sdma_v7_0_get_reg_offset(adev, i,
+ regSDMA0_QUEUE0_DOORBELL_OFFSET +
+ q * SDMA_V7_0_QUEUE_REG_STRIDE);
+ dboff = (RREG32(reg) &
+ SDMA0_QUEUE0_DOORBELL_OFFSET__OFFSET_MASK) >> 2;
+ if (dboff == doorbell_index) {
+ *instance_id = i;
+ *queue_id = q;
+ return true;
+ }
+ }
+ }
+ return false;
+}
+
static int sdma_v7_0_reset_queue(struct amdgpu_ring *ring,
unsigned int vmid,
struct amdgpu_fence *timedout_fence)
@@ -1694,6 +1722,10 @@ static const struct amdgpu_ring_funcs sdma_v7_0_ring_funcs = {
.reset = sdma_v7_0_reset_queue,
};
+static const struct amdgpu_sdma_funcs sdma_v7_0_sdma_funcs = {
+ .detect_hung_queue = sdma_v7_0_detect_hung_queue,
+};
+
static void sdma_v7_0_set_ring_funcs(struct amdgpu_device *adev)
{
int i;
@@ -1701,6 +1733,7 @@ static void sdma_v7_0_set_ring_funcs(struct amdgpu_device *adev)
for (i = 0; i < adev->sdma.num_instances; i++) {
adev->sdma.instance[i].ring.funcs = &sdma_v7_0_ring_funcs;
adev->sdma.instance[i].ring.me = i;
+ adev->sdma.instance[i].funcs = &sdma_v7_0_sdma_funcs;
}
}
--
2.49.0
next prev parent reply other threads:[~2026-09-03 9:44 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-03 9:42 [PATCH 1/4] drm/amdgpu/sdma: add detect_hung_queue callback Jesse Zhang
2026-09-03 9:42 ` [PATCH 2/4] drm/amdgpu/sdma6: implement detect_hung_queue Jesse Zhang
2026-09-03 9:42 ` Jesse Zhang [this message]
2026-09-03 9:42 ` [PATCH 4/4] drm/amdgpu/userq: reset a hung SDMA user queue over MMIO Jesse Zhang
2026-09-03 18:25 ` Alex Deucher
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