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Ip=[165.204.84.17]; Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C7.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6317 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: James Lin [Why & How] Track stream_update_needed and pass &bundle->stream_update to DC only when a real stream property was actually written (native-cursor disable, cursor position/attributes, VRR infopacket, modeset src/dst, color management, ABM level); otherwise pass NULL. An address-only flip then carries no stream_update and stays on the FAMS2 offload path. Reviewed-by: Leo Li Signed-off-by: James Lin Signed-off-by: Chenyu Chen --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 24cd21a39690..301e09e60e75 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -3885,6 +3885,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_commit *state, bool flip_latched_during_prog = false; bool dirty_rects_changed = false; bool updated_planes_and_streams = false; + bool stream_update_needed = false; struct { struct dc_surface_update surface_updates[MAX_SURFACES]; struct dc_plane_info plane_infos[MAX_SURFACES]; @@ -3918,6 +3919,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_commit *state, bundle->stream_update.cursor_position = &acrtc_state->stream->cursor_position; + stream_update_needed = true; } if (acrtc_state->active_planes == 0 && @@ -3941,8 +3943,10 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_commit *state, if ((fb && crtc == pcrtc) || (old_plane_state->fb && old_plane_state->crtc == pcrtc)) { cursor_update = true; - if (amdgpu_ip_version(dm->adev, DCE_HWIP, 0) != 0) + if (amdgpu_ip_version(dm->adev, DCE_HWIP, 0) != 0) { amdgpu_dm_update_cursor(plane, old_plane_state, &bundle->stream_update); + stream_update_needed = true; + } } continue; @@ -4149,6 +4153,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_commit *state, &acrtc_state->stream->vrr_infopacket; bundle->stream_update.vsp_infopacket = &acrtc_state->stream->vsp_infopacket; + stream_update_needed = true; } } } @@ -4183,6 +4188,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_commit *state, if (new_pcrtc_state->mode_changed) { bundle->stream_update.src = acrtc_state->stream->src; bundle->stream_update.dst = acrtc_state->stream->dst; + stream_update_needed = true; } if (new_pcrtc_state->color_mgmt_changed) { @@ -4200,11 +4206,14 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_commit *state, (struct dc_3dlut *) acrtc_state->stream->lut3d_func; bundle->stream_update.func_shaper = (struct dc_transfer_func *) acrtc_state->stream->func_shaper; + stream_update_needed = true; } acrtc_state->stream->abm_level = acrtc_state->abm_level; - if (acrtc_state->abm_level != dm_old_crtc_state->abm_level) + if (acrtc_state->abm_level != dm_old_crtc_state->abm_level) { bundle->stream_update.abm_level = &acrtc_state->abm_level; + stream_update_needed = true; + } /* * If FreeSync state on the stream has changed then we need to @@ -4223,7 +4232,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_commit *state, acrtc_state->update_type, planes_count, acrtc_state->stream, - &bundle->stream_update, + stream_update_needed ? &bundle->stream_update : NULL, bundle->surface_updates); updated_planes_and_streams = true; -- 2.43.0