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[79.129.254.8]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49d1fb1e4e4sm5190125e9.2.2026.09.08.11.11.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2026 11:11:11 -0700 (PDT) From: =?UTF-8?q?Timur=20Krist=C3=B3f?= To: amd-gfx@lists.freedesktop.org, =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= , Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= , Tvrtko Ursulin , pierre-eric.pelloux-prayer@amd.com, Natalie Vock , Lijo Lazar , Felix Kuehling Cc: =?UTF-8?q?Timur=20Krist=C3=B3f?= Subject: [PATCH 5/9] drm/amdgpu: Add amdgpu_ring_clear_ring_and_ptrs() Date: Tue, 8 Sep 2026 20:10:48 +0200 Message-ID: <20260908181052.381126-6-timur.kristof@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260908181052.381126-1-timur.kristof@gmail.com> References: <20260908181052.381126-1-timur.kristof@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" A new helper function which clears the contents of a ring and the relevant pointers such as rptr/wptr. Suggested-by: Lijo Lazar Signed-off-by: Timur Kristóf --- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h index 61e30de1977b..49df2c4745a1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h @@ -488,6 +488,25 @@ static inline void amdgpu_ring_clear_ring(struct amdgpu_ring *ring) memset32(ring->ring, ring->funcs->nop, ring->buf_mask + 1); } +static inline void amdgpu_ring_clear_ring_and_ptrs(struct amdgpu_ring *ring) +{ + /* Clear the contents of the ring. */ + amdgpu_ring_clear_ring(ring); + + /* Clear the ring pointers on the CPU. */ + ring->wptr = 0; + + /* + * Clear the ring pointers allocated in writeback. + * + * Note: we always allocate 64 bits for these pointers, + * but older HW generations only use the lower 32 bits. + * Use 64-bit atomics for simplicity. + */ + atomic64_set((atomic64_t *)ring->wptr_cpu_addr, 0); + atomic64_set((atomic64_t *)ring->rptr_cpu_addr, 0); +} + static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v) { ring->ring[ring->wptr++ & ring->buf_mask] = v; -- 2.55.0