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Thu, 24 Sep 2026 14:05:13 -0700 (PDT) Received: from maclinux ([2803:c600:9110:8ba5:43a9:9b8b:ebdc:6411]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-145ac67c0ccsm1054300c88.4.2026.09.24.14.05.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Sep 2026 14:05:13 -0700 (PDT) From: =?UTF-8?q?Francisco=20Beltr=C3=A1n=20Millal=C3=A9n?= To: alexander.deucher@amd.com, christian.koenig@amd.com, amd-gfx@lists.freedesktop.org Cc: alexdeucher@gmail.com, airlied@gmail.com, simona@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] drm/amdgpu/gmc_v8_0: restore the FB location after a re-POST Date: Thu, 24 Sep 2026 18:04:57 -0300 Message-ID: <20260924210457.13100-1-fbeltranmillalen@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Mailman-Approved-At: Fri, 25 Sep 2026 07:39:28 +0000 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On Thu, Sep 24, 2026 at 11:21 AM Alex Deucher wrote: > On Thu, Sep 24, 2026 at 11:06 AM Christian König > wrote: >> On 9/24/26 15:29, Francisco Beltrán Millalén wrote: >>> cold boot: MC_VM_FB_LOCATION = 0x007f0000 >>> after reset: MC_VM_FB_LOCATION = 0xf47ff400 >> >> Mhm, interesting I'm really wondering where those values come from. 0x007f0000 is what amdgpu finds when it loads after a cold boot, with HDP_NONSURFACE_BASE = 0: the framebuffer at MC address 0. That is what the platform hands over; I have no trace of who writes it before the kernel runs, so I can only say it comes from the Apple side. 0xf47ff400, with HDP_NONSURFACE_BASE = 0xf4000000, is written by the VBIOS ASIC_Init table that amdgpu runs on resume and after a GPU reset. I traced the register writes across that call. As far as I know it is the usual 0xF4_0000_0000 placement of Polaris boards elsewhere. (The "0xf400_0000" in my commit message was wrong: the MC address is 0xF4_0000_0000.) >> I think the more defensive approach is to do an ASIC reset on driver >> load and use the values the AtomBIOS init function comes up with. [...] > I agree that running asic_init > on boot for Macs would make sense. I think we already have a similar > workaround for some other mac models, probably to work around a > similar issue: > https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=a5be7ad8f5f0e067613e9197638f216f46252946 > Maybe add your device to that existing quirk or make the quirk generic > for all VI boards with apple ssids? That works, thank you both. I backported a5be7ad8f5f0 to 6.18.49, added this board (106b:017a rev c7) and dropped my gmc_v8_0 patch: - On load: "PCI CONFIG reset", "GPU posting now...", then "VRAM: 2048M 0x000000F400000000 - 0x000000F47FFFFFFF", after both a cold and a warm boot. With a debug print just before the reset, MC_VM_FB_LOCATION reads 0x007f0000 before it and 0xf47ff400 after. - S3: 9 suspend/resume cycles (lid close and rtcwake, one of them with the lid closed for about 7.5 minutes and a USB-C disk attached), each followed by a few minutes of 3D load. MC_VM_FB_LOCATION stays at 0xf47ff400 and no ring timeouts or VM faults were reported. In 4 of them my old patch was still in as a detector and never fired; the other 5 ran without it. The kernel also carries my unrelated PCI and ACPI patches for this machine. - Cost: the reset and post take 20-35 ms, and amdgpu init up to fbdev takes about 0.23 s longer than before. So please consider the gmc_v8_0 patch withdrawn. I'll send the one-line quirk as v2 in reply to this thread. Two things in case you prefer the generic version: - The GPU here is a Radeon Pro 555 (2 GB), not the 560 I wrote. The MacBookPro14,3 was also sold with a Pro 560. pci.ids lists 106b:0179 as a Radeon Pro 560 and 106b:0160, 0166 and 0167 as the Pro 460, 455 and 450 (the GPUs of the 2016 MacBookPro13,3), all 1002:67ef. I have not checked those IDs on real machines, and I only have this one, so I only added 017a/c7. - From reading the code, on VI the reset on load is always a PCI config reset: the BACO capability is only known once the PowerPlay table is parsed in hw_init, after the reset. That is also what happens here. Thanks, Francisco