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Tue, 10 Nov 2026 19:44:01 -0600 From: Wayne Lin To: CC: Harry Wentland , Leo Li , Aurabindo Pillai , Roman Li , Wayne Lin , Tom Chung , "Fangzhi Zuo" , Dan Wheeler , Ray Wu , Ivan Lipski , Alex Hung , James Lin , Chenyu Chen , Gabriel Abarca , "Dillon Varone" Subject: [PATCH 57/74] drm/amd/display: Increase state if dcfclk deep sleep needed exceeds dcfclk Date: Wed, 11 Nov 2026 09:29:03 +0800 Message-ID: <20261111014100.3596072-58-Wayne.Lin@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261111014100.3596072-1-Wayne.Lin@amd.com> References: <20261111014100.3596072-1-Wayne.Lin@amd.com> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF00000206:EE_|IA0PR12MB7579:EE_ X-MS-Office365-Filtering-Correlation-Id: d51495f6-4553-47cd-f3c8-08df3f9545cf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|23010399003|376014|36860700016|82310400026|30052699003|20052099010|261009223027099003|10067099003|3023799007|261028144727099003|261102123227099003|261026140227099003|261021123027099003|261021121427099003|261022105027099003|5023799004|11063799006|56012099006|22082099003|18002099003; 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Increase the state if dcfclk deep sleep needed is more than dcfclk. Cc: Dillon Varone Signed-off-by: Gabriel Abarca Signed-off-by: Wayne Lin --- .../amd/display/dc/dml2_0/dml21/inc/dml_top_types.h | 1 + .../dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c | 2 ++ .../dml2_core/dml2_core_dcn6_funcs_mode_programming.c | 4 +++- .../src/dml2_core/dml2_core_dcn6_funcs_mode_support.c | 10 +++++++++- .../dml21/src/dml2_core/dml2_core_shared_types.h | 1 + .../dc/dml2_0/dml21/src/dml2_core/dml2_core_utils.c | 4 ++++ 6 files changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h index fd7ccefc7fb7..4f4bfa58284a 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h @@ -382,6 +382,7 @@ struct dml2_mode_support_info { bool temp_read_or_ppt_support; bool qos_bandwidth_support; bool dcfclk_support; + bool dcfclk_deep_sleep_support; bool alternate_channel_size_support; bool EnoughUrgentLatencyHidingSupport; bool DSCSlicesODMModeSupported; diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c index c84cbad7fde1..a497a75ff9ac 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c @@ -13249,6 +13249,8 @@ void dml2_core_calcs_get_informative(const struct dml2_core_internal_display_mod out->informative.mode_support_info.ViewportSizeSupport = mode_lib->ms.support.ViewportSizeSupport; out->informative.mode_support_info.qos_bandwidth_support = mode_lib->ms.support.qos_bandwidth_support; out->informative.mode_support_info.dcfclk_support = mode_lib->ms.support.dcfclk_support; + out->informative.mode_support_info.dcfclk_deep_sleep_support = mode_lib->ms.support.dcfclk_deep_sleep_support; + for (k = 0; k < out->display_config.num_planes; k++) { diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_programming.c b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_programming.c index b46b396f45d4..464b7b00e8c2 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_programming.c +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_programming.c @@ -110,7 +110,9 @@ static void dcn6_mp_calculate_pixel_delivery_times(struct dml2_core_calculate_mp inputs->PSCL_THROUGHPUT, inputs->PSCL_THROUGHPUT_CHROMA, inputs->Dppclk, - inputs->DCFCLKDeepSleep, + // It is unnecessary and circular to use dcfclk_deepsleep here because dcfclk_deepsleep is derived from the line transferr time + // dcfclk is a better value here + inputs->Dcfclk, inputs->BytePerPixelY, inputs->BytePerPixelC, inputs->req_per_swath_ub_l, diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_support.c b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_support.c index 157b579073b6..c1cb43386473 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_support.c +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_support.c @@ -3434,6 +3434,9 @@ bool dcn6_ms_check_mode_support( goto fail; if (inputs->support.dcfclk_support == false) goto fail; + // it is better to increase the state than to clamp dcfclk deep sleep to dcfclk, so we check if the dcfclk deep sleep is less than or equal to dcfclk + if (inputs->support.dcfclk_deep_sleep_support == false) + goto fail; if (inputs->support.qos_bandwidth_support == false) goto fail; if (inputs->support.global_dram_clock_change_supported == false) @@ -3679,12 +3682,17 @@ bool dcn6_ms_check_dcfclk_support( && inputs->DCFCLK <= soc_bb->max_dcfclk_khz / 1000.0 && inputs->DCFCLK >= soc_bb->min_dcfclk_khz / 1000.0; + // it is better to increase the state than to clamp dcfclk deep sleep to dcfclk, so we check if the dcfclk deep sleep is less than or equal to dcfclk + outputs->support.dcfclk_deep_sleep_support = inputs->dcfclk_deepsleep <= inputs->DCFCLK; + DML_LOG_VERBOSE("outputs->support.dcfclk_support = %s\n", outputs->support.dcfclk_support ? "true" : "false"); + DML_LOG_VERBOSE("outputs->support.dcfclk_deepsleep_support = %s\n", outputs->support.dcfclk_deep_sleep_support ? "true" : "false"); DML_LOG_DEBUG_BOOL(outputs->support.dcfclk_support); + DML_LOG_DEBUG_BOOL(outputs->support.dcfclk_deep_sleep_support); DML_LOG_FUNC_EXIT(); - return outputs->support.dcfclk_support; + return outputs->support.dcfclk_support && outputs->support.dcfclk_deep_sleep_support; } void dcn6_ms_check_alternate_channel_size_support( diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_shared_types.h b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_shared_types.h index 9eabee1fc001..4848dbffc184 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_shared_types.h +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_shared_types.h @@ -356,6 +356,7 @@ struct dml2_core_internal_mode_support_info { struct dml2_core_internal_watermarks watermarks; bool dcfclk_support; + bool dcfclk_deep_sleep_support; bool qos_bandwidth_support; bool alternate_channel_size_support; }; diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_utils.c b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_utils.c index 4f5533dc0430..7cc3a4b4b3b7 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_utils.c +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_utils.c @@ -306,6 +306,10 @@ void dml2_core_utils_print_mode_support_info(const struct dml2_core_internal_mod DML_LOG_VERBOSE("DML: support: ExceededMALLSize = %d\n", support->ExceededMALLSize); if (!fail_only || support->g6_temp_read_support == 0) DML_LOG_VERBOSE("DML: support: g6_temp_read_support = %d\n", support->g6_temp_read_support); + if (!fail_only || support->dcfclk_support == 0) + DML_LOG_VERBOSE("DML: support: dcfclk_support = %d\n", support->dcfclk_support); + if (!fail_only || support->dcfclk_deep_sleep_support == 0) + DML_LOG_VERBOSE("DML: support: dcfclk_deepsleep_support = %d\n", support->dcfclk_deep_sleep_support); if (!fail_only || (support->global_dram_clock_change_supported == 0 && support->global_dram_clock_change_support_required)) DML_LOG_VERBOSE("DML: support: dram_clock_change_support = %d\n", support->global_dram_clock_change_supported); if (!fail_only || support->ImmediateFlipSupport == 0) -- 2.43.0