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Ip=[165.204.84.17]; Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: EA8PEPF00000008.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB5644 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "amd-gfx" X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 From: Wenjing Liu [Why] The requested QoS values returned by the QoS query read zero. The latency upper bounds and the calculated average bandwidth were never filled, and clearing the memory bandwidth override zeroed the bandwidth request instead of restoring the request of the committed mode. [How] Fill the avg and max nominal latency upper bounds from the DML qos_bound, converting from microseconds to nanoseconds. Fill the average active bandwidth from the DML informative qos output, converting from MBps to KBps. Report these from the committed state in dc_get_qos_info(). Restore the bandwidth lower bounds from the committed state when the override is cleared. Cc: Alvin Lee Cc: Mario Limonciello Cc: Alex Deucher Cc: stable@vger.kernel.org Signed-off-by: Wenjing Liu Signed-off-by: Wayne Lin --- .../drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c | 7 +++++-- drivers/gpu/drm/amd/display/dc/core/dc.c | 8 +++++--- .../dml21_wrapper/dml21_translation_helper.c | 11 +++++++++++ 3 files changed, 21 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c index c5d56757eafd..f801f3337e5d 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c @@ -1619,8 +1619,11 @@ static unsigned int dcn60_override_memory_bandwidth_request( memcpy(&new_clocks, &clk_mgr_base->clks, sizeof(struct dc_clocks)); if (bw_kbps == 0) { - new_clocks.utm_nominal_bandwidth_lb_KBps = 0; - new_clocks.utm_urgent_bandwidth_lb_KBps = 0; + /* Clearing the override restores the request of the committed mode. */ + new_clocks.utm_nominal_bandwidth_lb_KBps = + dc->current_state->bw_ctx.bw.dcn.clk.utm_nominal_bandwidth_lb_KBps; + new_clocks.utm_urgent_bandwidth_lb_KBps = + dc->current_state->bw_ctx.bw.dcn.clk.utm_urgent_bandwidth_lb_KBps; } else { max_bw_kbps = dcn60_get_max_active_utm_bandwidth_kbps(clk_mgr_base); capped_bw_kbps = (bw_kbps > max_bw_kbps) ? max_bw_kbps : bw_kbps; diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 656a941b1ba0..8a02bcbb9649 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -8105,12 +8105,14 @@ bool dc_get_qos_info(struct dc *dc, struct dc_qos_info *info) if (dc->clk_mgr && dc->clk_mgr->funcs->get_requested_memory_qos) { dc->clk_mgr->funcs->get_requested_memory_qos(dc->clk_mgr, &requested); info->qos_bandwidth_lb_in_mbps = requested.bandwidth_lb_in_mbps; - info->calculated_avg_bw_in_mbps = requested.calculated_avg_bw_in_mbps; - info->qos_max_latency_ub_in_ns = requested.max_latency_ub_in_ns; - info->qos_avg_latency_ub_in_ns = requested.avg_latency_ub_in_ns; info->qos_max_bw_budget_in_mbps = requested.max_bw_budget_in_mbps; } + /* The clk_mgr does not track these, so report the ones of the committed state. */ + info->calculated_avg_bw_in_mbps = clk->required_avg_active_bandwidth_KBps / 1000; + info->qos_max_latency_ub_in_ns = clk->utm_nominal_max_latency_ub_ns; + info->qos_avg_latency_ub_in_ns = clk->utm_nominal_avg_latency_ub_ns; + return true; } diff --git a/drivers/gpu/drm/amd/display/dc/dml2_wrapper/dml21_wrapper/dml21_translation_helper.c b/drivers/gpu/drm/amd/display/dc/dml2_wrapper/dml21_wrapper/dml21_translation_helper.c index a7d6ff59870a..31292a70a84e 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_wrapper/dml21_wrapper/dml21_translation_helper.c +++ b/drivers/gpu/drm/amd/display/dc/dml2_wrapper/dml21_wrapper/dml21_translation_helper.c @@ -1036,6 +1036,14 @@ void dml21_copy_clocks_to_dc_state(struct dml2_context *in_ctx, struct dc_state context->bw_ctx.bw.dcn.clk.utm_latency_ub_index = 0; /* TODO - derive from qos model */ context->bw_ctx.bw.dcn.clk.utm_nominal_bandwidth_lb_KBps = (unsigned int) in_ctx->v21.mode_programming.programming->qos_bound.bandwidth_lb.dcn5.non_urgent_bandwidth_kbps; context->bw_ctx.bw.dcn.clk.utm_urgent_bandwidth_lb_KBps = (unsigned int) in_ctx->v21.mode_programming.programming->qos_bound.bandwidth_lb.dcn5.urgent_bandwidth_kbps; + /* DML latency upper bounds are in microseconds, the dc clocks fields are in nanoseconds. */ + context->bw_ctx.bw.dcn.clk.utm_nominal_avg_latency_ub_ns = (unsigned int)( + in_ctx->v21.mode_programming.programming->qos_bound.latency_ub.dcn5.avg_req_latency_non_urg * 1000); + context->bw_ctx.bw.dcn.clk.utm_nominal_max_latency_ub_ns = (unsigned int)( + in_ctx->v21.mode_programming.programming->qos_bound.latency_ub.dcn5.max_req_latency_non_urg * 1000); + /* The average bandwidth DML calculated for the active state, converted from MBps to KBps. */ + context->bw_ctx.bw.dcn.clk.required_avg_active_bandwidth_KBps = (unsigned int)( + in_ctx->v21.mode_programming.programming->informative.qos.avg_bw_required.sys_active.sdp_bw_mbps * 1000); context->bw_ctx.bw.dcn.clk.stutter_efficiency.base_efficiency = (uint8_t)in_ctx->v21.mode_programming.programming->stutter.base_percent_efficiency; context->bw_ctx.bw.dcn.clk.stutter_efficiency.low_power_efficiency = (uint8_t)in_ctx->v21.mode_programming.programming->stutter.low_power_percent_efficiency; context->bw_ctx.bw.dcn.clk.stutter_efficiency.z8_stutter_efficiency = (uint8_t)in_ctx->v21.mode_programming.programming->informative.power_management.z8.stutter_efficiency; @@ -1177,6 +1185,9 @@ void dml21_init_min_clocks_for_dc_state(struct dml2_context *in_ctx, struct dc_s min_clocks->utm_latency_ub_index = 0; /* TODO - derive from qos model */ min_clocks->utm_nominal_bandwidth_lb_KBps = 0; min_clocks->utm_urgent_bandwidth_lb_KBps = 0; + min_clocks->utm_nominal_max_latency_ub_ns = 0; + min_clocks->utm_nominal_avg_latency_ub_ns = 0; + min_clocks->required_avg_active_bandwidth_KBps = 0; min_clocks->stutter_efficiency.base_efficiency = 1; min_clocks->stutter_efficiency.low_power_efficiency = 1; min_clocks->stutter_efficiency.z8_stutter_efficiency = 1; -- 2.43.0