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[176.77.154.214]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-447b4216675sm13184655f8f.11.2026.04.30.06.19.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Apr 2026 06:19:34 -0700 (PDT) From: Timur =?UTF-8?B?S3Jpc3TDs2Y=?= To: amd-gfx@lists.freedesktop.org, alexander.deucher@amd.com, Alex Hung , Harry Wentland , Roman Li , Leo Li , David Airlie , Mario Limonciello , Ivan Lipski , Melissa Wen Subject: Re: [PATCH 07/14] drm/amd/display: Delete disp_clk_voltage from integrated info Date: Thu, 30 Apr 2026 14:30:57 +0200 Message-ID: <22508251.4csPzL39Zc@timur-max> In-Reply-To: <2c83c16b-7e5c-4d1d-93f1-23109ee52a59@igalia.com> References: <20260423191519.73127-1-timur.kristof@gmail.com> <20260423191519.73127-8-timur.kristof@gmail.com> <2c83c16b-7e5c-4d1d-93f1-23109ee52a59@igalia.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On 2026. =C3=A1prilis 29., szerda 22:35:16 k=C3=B6z=C3=A9p-eur=C3=B3pai ny= =C3=A1ri id=C5=91 Melissa Wen=20 wrote: > On 23/04/2026 16:15, Timur Krist=C3=B3f wrote: > > Only DCE 11.0 relies on this information and even that > > didn't use this field, because it queries the information > > from the pplib. It also filled the field incorrectly on > > that version. > >=20 > > On newer GPUs, the VIOS integrated info no longer contains > > display clock voltage dependencies, so we don't need it. > >=20 > > Signed-off-by: Timur Krist=C3=B3f > > --- > >=20 > > .../gpu/drm/amd/display/dc/bios/bios_parser.c | 36 ------------------- > > .../drm/amd/display/dc/bios/bios_parser2.c | 9 ----- > > .../display/include/grph_object_ctrl_defs.h | 9 ----- > > 3 files changed, 54 deletions(-) > >=20 > > diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c > > b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c index > > 25c94962e1415..298a70852c1a8 100644 > > --- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c > > +++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c > > @@ -2348,15 +2348,6 @@ static enum bp_result get_integrated_info_v8( > >=20 > > info->dentist_vco_freq =3D le32_to_cpu(info_v8->ulDentistVCOFreq) *= =20 10; > > info->boot_up_uma_clock =3D le32_to_cpu(info_v8->ulBootUpUMAClock)=20 * 10; > >=20 > > - for (i =3D 0; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) { > > - /* Convert [10KHz] into [KHz] */ > > - info->disp_clk_voltage[i].max_supported_clk =3D > > - le32_to_cpu(info_v8->sDISPCLK_Voltage[i]. > > - ulMaximumSupportedCLK) * 10; > > - info->disp_clk_voltage[i].voltage_index =3D > > - le32_to_cpu(info_v8- >sDISPCLK_Voltage[i].ulVoltageIndex); > > - } > > - > >=20 > > info->boot_up_req_display_vector =3D > > =09 > > le32_to_cpu(info_v8->ulBootUpReqDisplayVector); > > =09 > > info->gpu_cap_info =3D > >=20 > > @@ -2499,14 +2490,6 @@ static enum bp_result get_integrated_info_v9( > >=20 > > info->dentist_vco_freq =3D le32_to_cpu(info_v9->ulDentistVCOFreq) *= =20 10; > > info->boot_up_uma_clock =3D le32_to_cpu(info_v9->ulBootUpUMAClock)=20 * 10; > >=20 > > - for (i =3D 0; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) { > > - /* Convert [10KHz] into [KHz] */ > > - info->disp_clk_voltage[i].max_supported_clk =3D > > - le32_to_cpu(info_v9- >sDISPCLK_Voltage[i].ulMaximumSupportedCLK) * 10; > > - info->disp_clk_voltage[i].voltage_index =3D > > - le32_to_cpu(info_v9- >sDISPCLK_Voltage[i].ulVoltageIndex); > > - } > > - > >=20 > > info->boot_up_req_display_vector =3D > > =09 > > le32_to_cpu(info_v9->ulBootUpReqDisplayVector); > > =09 > > info->gpu_cap_info =3D le32_to_cpu(info_v9->ulGPUCapInfo); > >=20 > > @@ -2648,25 +2631,6 @@ static enum bp_result construct_integrated_info( > >=20 > > } > > =09 > > } > >=20 > > - /* Sort voltage table from low to high*/ > > - if (result =3D=3D BP_RESULT_OK) { > > - int32_t i; > > - int32_t j; > > - > > - for (i =3D 1; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) { > > - for (j =3D i; j > 0; --j) { > > - if ( > > - info- >disp_clk_voltage[j].max_supported_clk < > > - info- >disp_clk_voltage[j-1].max_supported_clk) { > > - /* swap j and j - 1*/ > > - swap(info- >disp_clk_voltage[j - 1], > > - info- >disp_clk_voltage[j]); > > - } > > - } > > - } > > - > > - } > > - > >=20 > > return result; > > =20 > > } > >=20 > > diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c > > b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c index > > b4dd8219b8f09..0e7250f1d3f73 100644 > > --- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c > > +++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c > > @@ -3023,7 +3023,6 @@ static enum bp_result construct_integrated_info( > >=20 > > struct atom_data_revision revision; > > =09 > > int32_t i; > >=20 > > - int32_t j; > >=20 > > if (!info) > > =09 > > return result; > >=20 > > @@ -3125,14 +3124,6 @@ static enum bp_result construct_integrated_info( > >=20 > > DC_LOG_BIOS("driver forced fixdpvoltageswing=20 =3D %d\n", > > info- >ext_disp_conn_info.fixdpvoltageswing);> =09 > > } > > =09 > > } > >=20 > > - /* Sort voltage table from low to high*/ > > - for (i =3D 1; i < NUMBER_OF_DISP_CLK_VOLTAGE; ++i) { > > - for (j =3D i; j > 0; --j) { > > - if (info- >disp_clk_voltage[j].max_supported_clk < > > - info- >disp_clk_voltage[j-1].max_supported_clk) > > - swap(info->disp_clk_voltage[j-1],=20 info->disp_clk_voltage[j]); > > - } > > - } >=20 > I see in `get_integrated_info_v11()` a big portion of very old unused > code guarded by a `#if 0` that uses `NUMBER_OF_DISP_CLK_VOLTAGE` but > probably doesn't make sense anymore. > How about removing it too? As far as I understand, the VBIOS on newer GPUs doesn't have this informati= on=20 in the integrated info. I don't know what was the intention of that "#if 0". I can remove it if there are no objections from anyone here. >=20 > > return result; > > =20 > > } > >=20 > > diff --git a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h > > b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h index > > 38a77fa9b4afd..130d377f4f1d2 100644 > > --- a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h > > +++ b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h > > @@ -269,7 +269,6 @@ struct transmitter_configuration { > >=20 > > #define NUMBER_OF_UCHAR_FOR_GUID 16 > > #define MAX_NUMBER_OF_EXT_DISPLAY_PATH 7 > > #define NUMBER_OF_CSR_M3_ARB 10 > >=20 > > -#define NUMBER_OF_DISP_CLK_VOLTAGE 4 > >=20 > > #define NUMBER_OF_AVAILABLE_SCLK 5 > > =20 > > struct i2c_reg_info { > >=20 > > @@ -298,14 +297,6 @@ struct edp_info { > >=20 > > /* V6 */ > > struct integrated_info { > >=20 > > - struct clock_voltage_caps { > > - /* The Voltage Index indicated by FUSE, same voltage=20 index > > - shared with SCLK DPM fuse table */ > > - uint32_t voltage_index; > > - /* Maximum clock supported with specified voltage index=20 */ > > - uint32_t max_supported_clk; /* in KHz */ > > - } disp_clk_voltage[NUMBER_OF_DISP_CLK_VOLTAGE]; > > - > >=20 > > struct display_connection_info { > > =09 > > struct external_display_path { > > =09 > > /* A bit vector to show what devices are=20 supported */