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[2001:4c4e:24e4:7400:ad77:f2cc:91c9:a6fe]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8794f93c34sm1090067566b.0.2026.01.19.01.00.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jan 2026 01:00:13 -0800 (PST) From: Timur =?UTF-8?B?S3Jpc3TDs2Y=?= To: "Liang, Prike" , "amd-gfx@lists.freedesktop.org" , "Deucher, Alexander" , "Koenig, Christian" , "Limonciello, Mario" , Dan Carpenter , "Liang, Prike" Subject: Re: [PATCH] drm/amdgpu: Fix validating flush_gpu_tlb_pasid() Date: Mon, 19 Jan 2026 10:00:12 +0100 Message-ID: <27224237.1r3eYUQgxm@timur-hyperion> In-Reply-To: References: <20260118125746.40221-1-timur.kristof@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On Monday, January 19, 2026 6:27:10=E2=80=AFAM Central European Standard Ti= me Liang,=20 Prike wrote: > [Public] >=20 > In order to avoid being blocked by the lock issue on some older GFX, I wi= ll > push the patch to amd-staging-drm-next. > If you have any concerns, please > let me know. >=20 Hi Prike, Thank you, feel free to add the necessary tags and push the patch. Best regards, Timur >=20 >=20 > > -----Original Message----- > > From: amd-gfx On Behalf Of Lian= g, > > Prike Sent: Monday, January 19, 2026 9:58 AM > > To: Timur Krist=C3=B3f ; > > amd-gfx@lists.freedesktop.org; Deucher, Alexander > > ; Koenig, Christian > > ; Limonciello, Mario > > ; Dan Carpenter > > Subject: RE: [PATCH] drm/amdgpu: Fix validating flush_gpu_tlb_pasid() > > > > > > > > [Public] > > > > > > > > Thank you for the fix. Could you please add the following the tags? > > > > > > > > | Reported-by: kernel test robot > > | Reported-by: Dan Carpenter > > | Closes: https://lore.kernel.org/r/202601190121.z9C0uml5-lkp@intel.com/ > > > > > > > > Reviewed-by: Prike Liang > > > > > > > > Regards, > >=20 > > Prike > > > > > > > > > -----Original Message----- > > > From: Timur Krist=C3=B3f > > > Sent: Sunday, January 18, 2026 8:58 PM > > > To: amd-gfx@lists.freedesktop.org; Deucher, Alexander > > > ; Koenig, Christian > > > ; Liang, Prike ; > > > Limonciello, Mario > > > Cc: Timur Krist=C3=B3f > > > Subject: [PATCH] drm/amdgpu: Fix validating flush_gpu_tlb_pasid() > > > > > > > > > > > > When a function holds a lock and we return without unlocking it, it > > > deadlocks the kernel. We should always unlock before returning. > > > > > > > > > > > > This commit fixes suspend/resume on SI. > > > Tested on two Tahiti GPUs: FirePro W9000 and R9 280X. > > > > > > > > > > > > Fixes: bc2dea30038a ("drm/amdgpu: validate the flush_gpu_tlb_pasid()") > > > Signed-off-by: Timur Krist=C3=B3f > > > --- > > >=20 > > > drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 5 ++--- > > > 1 file changed, 2 insertions(+), 3 deletions(-) > > > > > > > > > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c > > > index 0e67fa4338ff..4fa24be1bf45 100644 > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c > > > @@ -769,7 +769,7 @@ int amdgpu_gmc_flush_gpu_tlb_pasid(struct > > > amdgpu_device *adev, uint16_t pasid, > > >=20 > > > struct amdgpu_ring *ring =3D &adev->gfx.kiq[inst].ring; > > > struct amdgpu_kiq *kiq =3D &adev->gfx.kiq[inst]; > > > unsigned int ndw; > > >=20 > > > - int r, cnt =3D 0; > > > + int r =3D 0, cnt =3D 0; > > >=20 > > > uint32_t seq; > > > > > > > > > > > > /* > > >=20 > > > @@ -782,7 +782,7 @@ int amdgpu_gmc_flush_gpu_tlb_pasid(struct > > > amdgpu_device *adev, uint16_t pasid, > > >=20 > > > if (!adev->gmc.flush_pasid_uses_kiq || !ring->sched.ready) { > > > > > > > > > > > > if (!adev->gmc.gmc_funcs->flush_gpu_tlb_pasid) > > >=20 > > > - return 0; > > > + goto error_unlock_reset; > > > > > > > > > > > > if (adev->gmc.flush_tlb_needs_extra_type_2) > > > =20 > > > adev->gmc.gmc_funcs->flush_gpu_tlb_pasid(adev, > > >=20 > > > pasid, @@ -797,7 +797,6 @@ int amdgpu_gmc_flush_gpu_tlb_pasid(struct > > > amdgpu_device *adev, uint16_t pasid, > > >=20 > > > adev->gmc.gmc_funcs->flush_gpu_tlb_pasid(adev, pasid, > > > =20 > > > flush_type, > > > all_hub, > > > inst); > > >=20 > > > - r =3D 0; > > >=20 > > > } else { > > > =20 > > > /* 2 dwords flush + 8 dwords fence */ > > > ndw =3D kiq->pmf->invalidate_tlbs_size + 8; > > >=20 > > > -- > > > 2.52.0 >=20 >=20