[RFC PATCH 0/7] drm/amdgpu: add MMIO-remap singleton BO for HDP flush

[RFC PATCH 0/7] drm/amdgpu: add MMIO-remap singleton BO for HDP flush

[Srinivasan Shanmugam]

This series introduces a kernel-managed singleton BO representing the
MMIO-remap (HDP flush) page and exposes it to userspace through a new
GEM domain.

Design ------
- A tiny (1-page) TTM bucket is introduced for AMDGPU_PL_MMIO_REMAP
  (mirroring doorbells).
- A singleton BO is created during amdgpu_ttm_init() and freed at
  fini().
- The BO is kernel-owned and never evicted.
- amdgpu_gem_create_ioctl() recognizes the new GEM domain bit
  (AMDGPU_GEM_DOMAIN_MMIO_REMAP) and returns a handle to the pre-created
singleton BO, enforcing size/alignment checks.
- Userspace thus gets a stable GEM handle and can mmap it to issue HDP
  flushes.

* Only compilation tested so far (x86_64, defconfig + amdgpu enabled).
* No runtime validation yet.

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>

Srinivasan Shanmugam (7):
  drm/amdgpu/uapi: add AMDGPU_GEM_DOMAIN_MMIO_REMAP
  drm/amdgpu: Add New TTM Placement - AMDGPU_PL_MMIO_REMAP and wire up
    plumbing
  drm/amdgpu: Plumbing for MMIO_REMAP memtype and user-visible strings
  drm/amdgpu: Add mmio_remap fields to amdgpu_device
  drm/amdgpu: Implement TTM handling for MMIO_REMAP placement
  drm/amdgpu: Create Singleton MMIO_REMAP BO and Initialize its pool
  drm/amdgpu: Return Handle to MMIO_REMAP Singleton for GEM Create

 drivers/gpu/drm/amd/amdgpu/amdgpu.h           |   7 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c    |   1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c       |  56 +++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c    |  13 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h    |   2 +
 .../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h    |   2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c       | 112 +++++++++++++++++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h       |   3 +-
 include/drm/ttm/ttm_resource.h                |   2 +-
 include/uapi/drm/amdgpu_drm.h                 |   8 +-
 10 files changed, 198 insertions(+), 8 deletions(-)

-- 
2.34.1

[RFC PATCH 1/7] drm/amdgpu/uapi: add AMDGPU_GEM_DOMAIN_MMIO_REMAP

[Srinivasan Shanmugam]

Add a new GEM domain bit AMDGPU_GEM_DOMAIN_MMIO_REMAP to allow
userspace to request the MMIO remap (HDP flush) page via GEM_CREATE.

- include/uapi/drm/amdgpu_drm.h:
  * define AMDGPU_GEM_DOMAIN_MMIO_REMAP
  * include the bit in AMDGPU_GEM_DOMAIN_MASK

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 include/uapi/drm/amdgpu_drm.h | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index bdedbaccf776..fc44e301adbb 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -103,6 +103,8 @@ extern "C" {
  *
  * %AMDGPU_GEM_DOMAIN_DOORBELL	Doorbell. It is an MMIO region for
  * signalling user mode queues.
+ *
+ * %AMDGPU_GEM_DOMAIN_MMIO_REMAP	MMIO remap page (special mapping for HDP flushing).
  */
 #define AMDGPU_GEM_DOMAIN_CPU		0x1
 #define AMDGPU_GEM_DOMAIN_GTT		0x2
@@ -111,13 +113,15 @@ extern "C" {
 #define AMDGPU_GEM_DOMAIN_GWS		0x10
 #define AMDGPU_GEM_DOMAIN_OA		0x20
 #define AMDGPU_GEM_DOMAIN_DOORBELL	0x40
+#define AMDGPU_GEM_DOMAIN_MMIO_REMAP	0x80
 #define AMDGPU_GEM_DOMAIN_MASK		(AMDGPU_GEM_DOMAIN_CPU | \
 					 AMDGPU_GEM_DOMAIN_GTT | \
 					 AMDGPU_GEM_DOMAIN_VRAM | \
 					 AMDGPU_GEM_DOMAIN_GDS | \
 					 AMDGPU_GEM_DOMAIN_GWS | \
-					 AMDGPU_GEM_DOMAIN_OA | \
-					 AMDGPU_GEM_DOMAIN_DOORBELL)
+					 AMDGPU_GEM_DOMAIN_OA |	\
+					 AMDGPU_GEM_DOMAIN_DOORBELL | \
+					 AMDGPU_GEM_DOMAIN_MMIO_REMAP)
 
 /* Flag that CPU access will be required for the case of VRAM domain */
 #define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED	(1 << 0)
-- 
2.34.1

[RFC PATCH 2/7] drm/amdgpu: Add New TTM Placement - AMDGPU_PL_MMIO_REMAP and wire up plumbing

[Srinivasan Shanmugam]

Introduce a kernel-internal TTM placement type AMDGPU_PL_MMIO_REMAP
for the HDP flush MMIO remap page

Plumbing added:
- amdgpu_res_cursor.{first,next}: treat MMIO_REMAP like DOORBELL
- amdgpu_ttm_io_mem_reserve(): return BAR bus address + offset
  for MMIO_REMAP, mark as uncached I/O
- amdgpu_ttm_io_mem_pfn(): PFN from register BAR
- amdgpu_res_cpu_visible(): visible to CPU
- amdgpu_evict_flags()/amdgpu_bo_move(): non-migratable
- amdgpu_ttm_tt_pde_flags(): map as SYSTEM
- amdgpu_bo_mem_stats_placement(): report AMDGPU_PL_MMIO_REMAP
- amdgpu_fdinfo: print “mmioremap” bucket label

Notes:
- This patch bumps __AMDGPU_PL_NUM and (for now) TTM_NUM_MEM_TYPES to
  avoid compile-time guards.

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 ++-
 include/drm/ttm/ttm_resource.h          | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 2309df3f68a9..bb17987f0447 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -34,7 +34,8 @@
 #define AMDGPU_PL_OA		(TTM_PL_PRIV + 2)
 #define AMDGPU_PL_PREEMPT	(TTM_PL_PRIV + 3)
 #define AMDGPU_PL_DOORBELL	(TTM_PL_PRIV + 4)
-#define __AMDGPU_PL_NUM	(TTM_PL_PRIV + 5)
+#define AMDGPU_PL_MMIO_REMAP	(TTM_PL_PRIV + 5)
+#define __AMDGPU_PL_NUM	(TTM_PL_PRIV + 6)
 
 #define AMDGPU_GTT_MAX_TRANSFER_SIZE	512
 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS	2
diff --git a/include/drm/ttm/ttm_resource.h b/include/drm/ttm/ttm_resource.h
index e52bba15012f..f49daa504c36 100644
--- a/include/drm/ttm/ttm_resource.h
+++ b/include/drm/ttm/ttm_resource.h
@@ -36,7 +36,7 @@
 #include <drm/ttm/ttm_kmap_iter.h>
 
 #define TTM_MAX_BO_PRIORITY	4U
-#define TTM_NUM_MEM_TYPES 8
+#define TTM_NUM_MEM_TYPES 9
 
 struct dmem_cgroup_device;
 struct ttm_device;
-- 
2.34.1

[RFC PATCH 3/7] drm/amdgpu: Plumbing for MMIO_REMAP memtype and user-visible strings

[Srinivasan Shanmugam]

Wire up the conversions and strings for the new MMIO_REMAP placement:

* amdgpu_mem_type_to_domain() maps AMDGPU_PL_MMIO_REMAP -> domain
* amdgpu_bo_placement_from_domain() accepts the new domain
* amdgpu_bo_mem_stats_placement() and amdgpu_bo_print_info() report it
* res cursor supports the new placement
* fdinfo prints "mmioremap" for the new placement

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c     |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c     | 13 +++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h     |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h |  2 ++
 4 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
index 91d638098889..b349bb3676d5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
@@ -70,6 +70,7 @@ void amdgpu_show_fdinfo(struct drm_printer *p, struct drm_file *file)
 		[AMDGPU_PL_GWS] = "gws",
 		[AMDGPU_PL_OA] = "oa",
 		[AMDGPU_PL_DOORBELL] = "doorbell",
+		[AMDGPU_PL_MMIO_REMAP] = "mmioremap",
 	};
 	unsigned int hw_ip, i;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 122a88294883..fe486988a738 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -153,6 +153,14 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
 		c++;
 	}
 
+	if (domain & AMDGPU_GEM_DOMAIN_MMIO_REMAP) {
+		places[c].fpfn = 0;
+		places[c].lpfn = 0;
+		places[c].mem_type = AMDGPU_PL_MMIO_REMAP;
+		places[c].flags = 0;
+		c++;
+	}
+
 	if (domain & AMDGPU_GEM_DOMAIN_GTT) {
 		places[c].fpfn = 0;
 		places[c].lpfn = 0;
@@ -1545,6 +1553,8 @@ uint32_t amdgpu_bo_mem_stats_placement(struct amdgpu_bo *bo)
 		return AMDGPU_PL_OA;
 	case AMDGPU_GEM_DOMAIN_DOORBELL:
 		return AMDGPU_PL_DOORBELL;
+	case AMDGPU_GEM_DOMAIN_MMIO_REMAP:
+		return AMDGPU_PL_MMIO_REMAP;
 	default:
 		return TTM_PL_SYSTEM;
 	}
@@ -1628,6 +1638,9 @@ u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m)
 			case AMDGPU_PL_DOORBELL:
 				placement = "DOORBELL";
 				break;
+			case AMDGPU_PL_MMIO_REMAP:
+				placement = "MMIO REMAP";
+				break;
 			case TTM_PL_SYSTEM:
 			default:
 				placement = "CPU";
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 87523fcd4386..656b8a931dae 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -167,6 +167,8 @@ static inline unsigned amdgpu_mem_type_to_domain(u32 mem_type)
 		return AMDGPU_GEM_DOMAIN_OA;
 	case AMDGPU_PL_DOORBELL:
 		return AMDGPU_GEM_DOMAIN_DOORBELL;
+	case AMDGPU_PL_MMIO_REMAP:
+		return AMDGPU_GEM_DOMAIN_MMIO_REMAP;
 	default:
 		break;
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
index 50fcd86e1033..be2e56ce1355 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
@@ -91,6 +91,7 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
 		break;
 	case TTM_PL_TT:
 	case AMDGPU_PL_DOORBELL:
+	case AMDGPU_PL_MMIO_REMAP:
 		node = to_ttm_range_mgr_node(res)->mm_nodes;
 		while (start >= node->size << PAGE_SHIFT)
 			start -= node++->size << PAGE_SHIFT;
@@ -153,6 +154,7 @@ static inline void amdgpu_res_next(struct amdgpu_res_cursor *cur, uint64_t size)
 		break;
 	case TTM_PL_TT:
 	case AMDGPU_PL_DOORBELL:
+	case AMDGPU_PL_MMIO_REMAP:
 		node = cur->node;
 
 		cur->node = ++node;
-- 
2.34.1

[RFC PATCH 4/7] drm/amdgpu: Add mmio_remap fields to amdgpu_device

[Srinivasan Shanmugam]

Add bookkeeping for the remap page to struct amdgpu_device:

* mmio_remap_bo (singleton BO)
* mmio_remap_base, mmio_remap_barsz (register BAR base/size)
* mmio_remap_offset (BAR-relative offset of the remap page)
* mmio_remap_size (PAGE_SIZE)

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ddd472e56f69..6c477596617b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1038,6 +1038,13 @@ struct amdgpu_device {
 	amdgpu_block_wreg_t		audio_endpt_wreg;
 	struct amdgpu_doorbell		doorbell;
 
+	/* ===== MMIO remap (HDP flush) bookkeeping ===== */
+	struct amdgpu_bo		*mmio_remap_bo;   /* singleton BO */
+	resource_size_t 		 mmio_remap_base;  /* REG BAR bus base */
+	resource_size_t 		 mmio_remap_barsz; /* REG BAR size */
+	resource_size_t 		 mmio_remap_offset;/* BAR-relative offset of remap page */
+	resource_size_t 		 mmio_remap_size;  /* always PAGE_SIZE */
+
 	/* clock/pll info */
 	struct amdgpu_clock            clock;
 
-- 
2.34.1

[RFC PATCH 5/7] drm/amdgpu: Implement TTM handling for MMIO_REMAP placement

[Srinivasan Shanmugam]

Implement TTM-level behavior for AMDGPU_PL_MMIO_REMAP so it behaves
as a CPU-visible IO page:

* amdgpu_evict_flags(): mark as unmovable
* amdgpu_res_cpu_visible(): consider CPU-visible
* amdgpu_bo_move(): use null move when src/dst is MMIO_REMAP
* amdgpu_ttm_io_mem_reserve(): program bus.offset/is_iomem/caching using
  the device's mmio_remap_* metadata
* amdgpu_ttm_io_mem_pfn(): return PFN for the remapped HDP page
* amdgpu_ttm_tt_pde_flags(): set AMDGPU_PTE_SYSTEM for this mem type

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 26 +++++++++++++++++++++----
 1 file changed, 22 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 27ab4e754b2a..157a5416a826 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -123,6 +123,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
 	case AMDGPU_PL_GWS:
 	case AMDGPU_PL_OA:
 	case AMDGPU_PL_DOORBELL:
+	case AMDGPU_PL_MMIO_REMAP:
 		placement->num_placement = 0;
 		return;
 
@@ -447,7 +448,8 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev,
 		return false;
 
 	if (res->mem_type == TTM_PL_SYSTEM || res->mem_type == TTM_PL_TT ||
-	    res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL)
+	    res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL ||
+		res->mem_type == AMDGPU_PL_MMIO_REMAP)
 		return true;
 
 	if (res->mem_type != TTM_PL_VRAM)
@@ -538,10 +540,12 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
 	    old_mem->mem_type == AMDGPU_PL_GWS ||
 	    old_mem->mem_type == AMDGPU_PL_OA ||
 	    old_mem->mem_type == AMDGPU_PL_DOORBELL ||
+	    old_mem->mem_type == AMDGPU_PL_MMIO_REMAP ||
 	    new_mem->mem_type == AMDGPU_PL_GDS ||
 	    new_mem->mem_type == AMDGPU_PL_GWS ||
 	    new_mem->mem_type == AMDGPU_PL_OA ||
-	    new_mem->mem_type == AMDGPU_PL_DOORBELL) {
+	    new_mem->mem_type == AMDGPU_PL_DOORBELL ||
+	    new_mem->mem_type == AMDGPU_PL_MMIO_REMAP) {
 		/* Nothing to save here */
 		amdgpu_bo_move_notify(bo, evict, new_mem);
 		ttm_bo_move_null(bo, new_mem);
@@ -629,6 +633,12 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
 		mem->bus.is_iomem = true;
 		mem->bus.caching = ttm_uncached;
 		break;
+	case AMDGPU_PL_MMIO_REMAP:  /* <=== New HDP domain for remap page */
+		mem->bus.offset  = ((resource_size_t)mem->start << PAGE_SHIFT);
+		mem->bus.offset += adev->mmio_remap_base + adev->mmio_remap_offset;
+		mem->bus.is_iomem = true;
+		mem->bus.caching = ttm_uncached;
+		break;
 	default:
 		return -EINVAL;
 	}
@@ -640,12 +650,20 @@ static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
 {
 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
 	struct amdgpu_res_cursor cursor;
+	u64 pfn;
 
 	amdgpu_res_first(bo->resource, (u64)page_offset << PAGE_SHIFT, 0,
 			 &cursor);
 
-	if (bo->resource->mem_type == AMDGPU_PL_DOORBELL)
+	if (bo->resource->mem_type == AMDGPU_PL_DOORBELL) {
 		return ((uint64_t)(adev->doorbell.base + cursor.start)) >> PAGE_SHIFT;
+	} else if (bo->resource->mem_type == AMDGPU_PL_MMIO_REMAP) {
+		/* Return PFN for the remapped HDP page */
+		pfn = (u64)adev->mmio_remap_base +
+			(u64)adev->mmio_remap_offset +
+			(u64)cursor.start;
+		return (unsigned long)(pfn >> PAGE_SHIFT);
+	}
 
 	return (adev->gmc.aper_base + cursor.start) >> PAGE_SHIFT;
 }
@@ -1355,7 +1373,7 @@ uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem)
 
 	if (mem && (mem->mem_type == TTM_PL_TT ||
 		    mem->mem_type == AMDGPU_PL_DOORBELL ||
-		    mem->mem_type == AMDGPU_PL_PREEMPT)) {
+		    mem->mem_type == AMDGPU_PL_PREEMPT || mem->mem_type == AMDGPU_PL_MMIO_REMAP)) {
 		flags |= AMDGPU_PTE_SYSTEM;
 
 		if (ttm->caching == ttm_cached)
-- 
2.34.1

[RFC PATCH 6/7] drm/amdgpu: Create Singleton MMIO_REMAP BO and Initialize its pool

[Srinivasan Shanmugam]

Create the single-page MMIO_REMAP BO and initialize a tiny on-chip
range manager for the new placement:

* add amdgpu_mmio_remap_bo_init()/fini()
* in amdgpu_ttm_init(): initialize AMDGPU_PL_MMIO_REMAP heap and create
  the PAGE_SIZE BO
* in amdgpu_ttm_fini(): drop BO and tear down the range manager

This isolates lifetime management and error paths for the remap BO and
ties them into the TTM bring-up/teardown flow.

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 86 +++++++++++++++++++++++++
 1 file changed, 86 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 157a5416a826..ab93fbec2a34 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1859,6 +1859,73 @@ static void amdgpu_ttm_pools_fini(struct amdgpu_device *adev)
 	adev->mman.ttm_pools = NULL;
 }
 
+/* ================= MMIO remap (HDP flush) singleton BO ================= */
+static int amdgpu_mmio_remap_bo_init(struct amdgpu_device *adev)
+{
+	resource_size_t bar_base, bar_len, bus, off;
+	int r;
+
+	/* The ASIC code should have set this to the absolute bus address
+	 * of the remap page (inside the register BAR).
+	 */
+	bus = adev->rmmio_remap.bus_addr;
+	if (!bus) {
+		dev_dbg(adev->dev, "MMIO_REMAP: no remap bus addr; skipping BO\n");
+		return -ENODEV;
+	}
+
+	/* The register BAR base/size were established in amdgpu_device_init() */
+	bar_base = adev->rmmio_base;
+	bar_len  = adev->rmmio_size;
+
+	/* Sanity: page must lie wholly inside the register BAR */
+	if (bus < bar_base || (bus + PAGE_SIZE) > (bar_base + bar_len)) {
+		dev_err(adev->dev,
+			"MMIO_REMAP: bus 0x%llx not in REG BAR [0x%llx..0x%llx)\n",
+			(unsigned long long)bus,
+			(unsigned long long)bar_base,
+			(unsigned long long)(bar_base + bar_len));
+		return -ERANGE;
+	}
+
+	off = bus - bar_base;
+	if (!IS_ALIGNED(off, PAGE_SIZE)) {
+		dev_err(adev->dev, "MMIO_REMAP: offset 0x%llx not page-aligned\n",
+			(unsigned long long)off);
+		return -EINVAL;
+	}
+
+	/* Create exactly ONE kernel-owned BO in the MMIO_REMAP domain */
+	r = amdgpu_bo_create_kernel(adev,
+				    PAGE_SIZE,                 /* bo_size  */
+				    PAGE_SIZE,                 /* alignment*/
+				    AMDGPU_GEM_DOMAIN_MMIO_REMAP,
+				    &adev->mmio_remap_bo,
+				    NULL, NULL);
+	if (r) {
+		dev_err(adev->dev, "MMIO_REMAP: BO create failed (%d)\n", r);
+		return r;
+	}
+
+	dev_dbg(adev->dev,
+		"MMIO_REMAP: base=0x%llx off=0x%llx size=0x%lx (BO created)\n",
+		(unsigned long long)adev->mmio_remap_base,
+		(unsigned long long)adev->mmio_remap_offset,
+		(unsigned long)adev->mmio_remap_size);
+
+	return 0;
+}
+
+static void amdgpu_mmio_remap_bo_fini(struct amdgpu_device *adev)
+{
+
+	if (adev->mmio_remap_bo)
+		amdgpu_bo_free_kernel(&adev->mmio_remap_bo, NULL, NULL);
+	adev->mmio_remap_bo = NULL;
+
+	return;
+}
+
 /*
  * amdgpu_ttm_init - Init the memory management (ttm) as well as various
  * gtt/vram related fields.
@@ -2026,6 +2093,20 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
 		return r;
 	}
 
+	/* Initialize MMIO-remap pool (single page) */
+	r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_MMIO_REMAP, 1);
+	if (r) {
+		dev_err(adev->dev, "Failed initializing MMIO-remap heap.\n");
+		return r;
+	}
+
+	/* Create the singleton MMIO-remap BO (one page) */
+	r = amdgpu_mmio_remap_bo_init(adev);
+	if (r) {
+		dev_err(adev->dev, "Failed to create MMIO-remap singleton BO.\n");
+		return r;
+	}
+
 	/* Initialize preemptible memory pool */
 	r = amdgpu_preempt_mgr_init(adev);
 	if (r) {
@@ -2088,6 +2169,9 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
 	}
 	amdgpu_bo_free_kernel(&adev->mman.sdma_access_bo, NULL,
 					&adev->mman.sdma_access_ptr);
+
+	/* === Drop the singleton MMIO-remap BO === */
+	amdgpu_mmio_remap_bo_fini(adev);
 	amdgpu_ttm_fw_reserve_vram_fini(adev);
 	amdgpu_ttm_drv_reserve_vram_fini(adev);
 
@@ -2109,6 +2193,8 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
 	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GWS);
 	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_OA);
 	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_DOORBELL);
+	/* Tear down the tiny range manager for MMIO-remap */
+	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_MMIO_REMAP);
 	ttm_device_fini(&adev->mman.bdev);
 	adev->mman.initialized = false;
 	dev_info(adev->dev, "amdgpu: ttm finalized\n");
-- 
2.34.1

[RFC PATCH 7/7] drm/amdgpu: Return Handle to MMIO_REMAP Singleton for GEM Create

[Srinivasan Shanmugam]

When userspace requests a GEM in AMDGPU_GEM_DOMAIN_MMIO_REMAP, return a
handle to the kernel-owned singleton BO instead of allocating a new one.

Validate inputs (exact PAGE_SIZE, alignment PAGE_SIZE, no extra flags)
and zero the ioctl out-struct on success for a clean echo.

This puts the userspace-visible behavior last, after all internal kernel
plumbing and initialization are in place.

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 56 +++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index e3f65977eeee..1345e81214e8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -424,6 +424,26 @@ const struct drm_gem_object_funcs amdgpu_gem_object_funcs = {
 	.vm_ops = &amdgpu_gem_vm_ops,
 };
 
+/* ========= MMIO remap (HDP flush) GEM handle helper ========= */
+static int amdgpu_gem_get_mmio_remap_handle(struct drm_file *file_priv,
+					    struct amdgpu_device *adev,
+					    u32 *handle)
+{
+	struct amdgpu_bo *bo = adev->mmio_remap_bo;
+	struct drm_gem_object *gobj;
+	int r;
+
+	if (!bo)
+		return -ENODEV;
+
+	/* Take a temporary ref; the handle creation will hold its own ref. */
+	bo = amdgpu_bo_ref(bo);
+	gobj = &bo->tbo.base;
+	r = drm_gem_handle_create(file_priv, gobj, handle);
+	amdgpu_bo_unref(&bo);  /* drops our temporary ref */
+	return r;
+}
+
 /*
  * GEM ioctls.
  */
@@ -465,6 +485,42 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
 	/* always clear VRAM */
 	flags |= AMDGPU_GEM_CREATE_VRAM_CLEARED;
 
+	/*
+	 * === MMIO remap (HDP flush) fast-path ===
+	 * If userspace asks for the MMIO_REMAP domain, don't allocate a new BO.
+	 * Return a handle to the singleton BO created at device init.
+	 */
+	if (args->in.domains & AMDGPU_GEM_DOMAIN_MMIO_REMAP) {
+		u32 mmio_handle;
+		/* Enforce fixed size & alignment (exactly one page). */
+		if (size && size != PAGE_SIZE)
+			return -EINVAL;
+		if (args->in.alignment && args->in.alignment != PAGE_SIZE)
+			return -EINVAL;
+		/* No extra domain flags for this special object. */
+		if (args->in.domain_flags)
+			return -EINVAL;
+		/* Disallow flags that don't make sense for a fixed I/O page. */
+		if (flags & (AMDGPU_GEM_CREATE_CPU_GTT_USWC |
+			     AMDGPU_GEM_CREATE_ENCRYPTED |
+			     AMDGPU_GEM_CREATE_DISCARDABLE))
+			return -EINVAL;
+
+		/* Normalize inputs (optional, for user-visible echo/debug). */
+		args->in.bo_size     = PAGE_SIZE;
+		args->in.alignment   = PAGE_SIZE;
+		args->in.domains     = AMDGPU_GEM_DOMAIN_MMIO_REMAP;
+		args->in.domain_flags = 0;
+
+		r = amdgpu_gem_get_mmio_remap_handle(filp, adev, &mmio_handle);
+		if (r)
+			return r;
+
+		memset(args, 0, sizeof(*args));
+		args->out.handle = mmio_handle;
+		return 0;
+	}
+
 	/* create a gem object to contain this object in */
 	if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |
 	    AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
-- 
2.34.1

RE: [RFC PATCH 4/7] drm/amdgpu: Add mmio_remap fields to amdgpu_device

[Deucher, Alexander]

[Public]

> -----Original Message-----
> From: SHANMUGAM, SRINIVASAN <SRINIVASAN.SHANMUGAM@amd.com>
> Sent: Wednesday, August 20, 2025 7:33 AM
> To: Koenig, Christian <Christian.Koenig@amd.com>; Deucher, Alexander
> <Alexander.Deucher@amd.com>
> Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
> <SRINIVASAN.SHANMUGAM@amd.com>
> Subject: [RFC PATCH 4/7] drm/amdgpu: Add mmio_remap fields to amdgpu_device
>
> Add bookkeeping for the remap page to struct amdgpu_device:
>
> * mmio_remap_bo (singleton BO)
> * mmio_remap_base, mmio_remap_barsz (register BAR base/size)
> * mmio_remap_offset (BAR-relative offset of the remap page)
> * mmio_remap_size (PAGE_SIZE)

It's not PAGE_SIZE it's 4K.  If the PAGE_SIZE is >4K on the system, then we can't support this.

>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index ddd472e56f69..6c477596617b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1038,6 +1038,13 @@ struct amdgpu_device {
>       amdgpu_block_wreg_t             audio_endpt_wreg;
>       struct amdgpu_doorbell          doorbell;
>
> +     /* ===== MMIO remap (HDP flush) bookkeeping ===== */
> +     struct amdgpu_bo                *mmio_remap_bo;   /* singleton BO */
> +     resource_size_t                  mmio_remap_base;  /* REG BAR bus base */
> +     resource_size_t                  mmio_remap_barsz; /* REG BAR size */
> +     resource_size_t                  mmio_remap_offset;/* BAR-relative offset of
> remap page */
> +     resource_size_t                  mmio_remap_size;  /* always PAGE_SIZE */

Always 4K.

Alex


> +
>       /* clock/pll info */
>       struct amdgpu_clock            clock;
>
> --
> 2.34.1

RE: [RFC PATCH 4/7] drm/amdgpu: Add mmio_remap fields to amdgpu_device

[Deucher, Alexander]

[Public]

> -----Original Message-----
> From: SHANMUGAM, SRINIVASAN <SRINIVASAN.SHANMUGAM@amd.com>
> Sent: Wednesday, August 20, 2025 7:33 AM
> To: Koenig, Christian <Christian.Koenig@amd.com>; Deucher, Alexander
> <Alexander.Deucher@amd.com>
> Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
> <SRINIVASAN.SHANMUGAM@amd.com>
> Subject: [RFC PATCH 4/7] drm/amdgpu: Add mmio_remap fields to amdgpu_device
>
> Add bookkeeping for the remap page to struct amdgpu_device:
>
> * mmio_remap_bo (singleton BO)
> * mmio_remap_base, mmio_remap_barsz (register BAR base/size)
> * mmio_remap_offset (BAR-relative offset of the remap page)
> * mmio_remap_size (PAGE_SIZE)
>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index ddd472e56f69..6c477596617b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1038,6 +1038,13 @@ struct amdgpu_device {
>       amdgpu_block_wreg_t             audio_endpt_wreg;
>       struct amdgpu_doorbell          doorbell;
>
> +     /* ===== MMIO remap (HDP flush) bookkeeping ===== */
> +     struct amdgpu_bo                *mmio_remap_bo;   /* singleton BO */
> +     resource_size_t                  mmio_remap_base;  /* REG BAR bus base */
> +     resource_size_t                  mmio_remap_barsz; /* REG BAR size */
> +     resource_size_t                  mmio_remap_offset;/* BAR-relative offset of
> remap page */
> +     resource_size_t                  mmio_remap_size;  /* always PAGE_SIZE */


Also maybe put these in their own struct, similar to what we do for doorbells and drop the mmio_remap prefix.  E.g.,

struct amdgpu_mmio_remap.{
    resource_size_t base;
    resource_size_t size
    struct amdgpu_bo;
};

Alex

> +
>       /* clock/pll info */
>       struct amdgpu_clock            clock;
>
> --
> 2.34.1

Re: [RFC PATCH 5/7] drm/amdgpu: Implement TTM handling for MMIO_REMAP placement

[Alex Deucher]

On Wed, Aug 20, 2025 at 8:28 AM Srinivasan Shanmugam
<srinivasan.shanmugam@amd.com> wrote:
>
> Implement TTM-level behavior for AMDGPU_PL_MMIO_REMAP so it behaves
> as a CPU-visible IO page:
>
> * amdgpu_evict_flags(): mark as unmovable
> * amdgpu_res_cpu_visible(): consider CPU-visible
> * amdgpu_bo_move(): use null move when src/dst is MMIO_REMAP
> * amdgpu_ttm_io_mem_reserve(): program bus.offset/is_iomem/caching using
>   the device's mmio_remap_* metadata
> * amdgpu_ttm_io_mem_pfn(): return PFN for the remapped HDP page
> * amdgpu_ttm_tt_pde_flags(): set AMDGPU_PTE_SYSTEM for this mem type
>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 26 +++++++++++++++++++++----
>  1 file changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 27ab4e754b2a..157a5416a826 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -123,6 +123,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
>         case AMDGPU_PL_GWS:
>         case AMDGPU_PL_OA:
>         case AMDGPU_PL_DOORBELL:
> +       case AMDGPU_PL_MMIO_REMAP:
>                 placement->num_placement = 0;
>                 return;
>
> @@ -447,7 +448,8 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev,
>                 return false;
>
>         if (res->mem_type == TTM_PL_SYSTEM || res->mem_type == TTM_PL_TT ||
> -           res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL)
> +           res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL ||
> +               res->mem_type == AMDGPU_PL_MMIO_REMAP)
>                 return true;
>
>         if (res->mem_type != TTM_PL_VRAM)
> @@ -538,10 +540,12 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
>             old_mem->mem_type == AMDGPU_PL_GWS ||
>             old_mem->mem_type == AMDGPU_PL_OA ||
>             old_mem->mem_type == AMDGPU_PL_DOORBELL ||
> +           old_mem->mem_type == AMDGPU_PL_MMIO_REMAP ||
>             new_mem->mem_type == AMDGPU_PL_GDS ||
>             new_mem->mem_type == AMDGPU_PL_GWS ||
>             new_mem->mem_type == AMDGPU_PL_OA ||
> -           new_mem->mem_type == AMDGPU_PL_DOORBELL) {
> +           new_mem->mem_type == AMDGPU_PL_DOORBELL ||
> +           new_mem->mem_type == AMDGPU_PL_MMIO_REMAP) {
>                 /* Nothing to save here */
>                 amdgpu_bo_move_notify(bo, evict, new_mem);
>                 ttm_bo_move_null(bo, new_mem);
> @@ -629,6 +633,12 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
>                 mem->bus.is_iomem = true;
>                 mem->bus.caching = ttm_uncached;
>                 break;
> +       case AMDGPU_PL_MMIO_REMAP:  /* <=== New HDP domain for remap page */

This comment can be dropped.  It's just a remapping range.  We've only
used it for the HDP registers, but it could be used for other things
in the future.

> +               mem->bus.offset  = ((resource_size_t)mem->start << PAGE_SHIFT);
> +               mem->bus.offset += adev->mmio_remap_base + adev->mmio_remap_offset;

This should be the same as the doorbell handling, just replace
adev->doorbell.base with adev->mmio_remap.base

Alex

> +               mem->bus.is_iomem = true;
> +               mem->bus.caching = ttm_uncached;
> +               break;
>         default:
>                 return -EINVAL;
>         }
> @@ -640,12 +650,20 @@ static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
>  {
>         struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
>         struct amdgpu_res_cursor cursor;
> +       u64 pfn;
>
>         amdgpu_res_first(bo->resource, (u64)page_offset << PAGE_SHIFT, 0,
>                          &cursor);
>
> -       if (bo->resource->mem_type == AMDGPU_PL_DOORBELL)
> +       if (bo->resource->mem_type == AMDGPU_PL_DOORBELL) {
>                 return ((uint64_t)(adev->doorbell.base + cursor.start)) >> PAGE_SHIFT;
> +       } else if (bo->resource->mem_type == AMDGPU_PL_MMIO_REMAP) {
> +               /* Return PFN for the remapped HDP page */
> +               pfn = (u64)adev->mmio_remap_base +
> +                       (u64)adev->mmio_remap_offset +
> +                       (u64)cursor.start;
> +               return (unsigned long)(pfn >> PAGE_SHIFT);
> +       }
>
>         return (adev->gmc.aper_base + cursor.start) >> PAGE_SHIFT;
>  }
> @@ -1355,7 +1373,7 @@ uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem)
>
>         if (mem && (mem->mem_type == TTM_PL_TT ||
>                     mem->mem_type == AMDGPU_PL_DOORBELL ||
> -                   mem->mem_type == AMDGPU_PL_PREEMPT)) {
> +                   mem->mem_type == AMDGPU_PL_PREEMPT || mem->mem_type == AMDGPU_PL_MMIO_REMAP)) {
>                 flags |= AMDGPU_PTE_SYSTEM;
>
>                 if (ttm->caching == ttm_cached)
> --
> 2.34.1
>

Re: [RFC PATCH 6/7] drm/amdgpu: Create Singleton MMIO_REMAP BO and Initialize its pool

[Alex Deucher]

On Wed, Aug 20, 2025 at 7:33 AM Srinivasan Shanmugam
<srinivasan.shanmugam@amd.com> wrote:
>
> Create the single-page MMIO_REMAP BO and initialize a tiny on-chip
> range manager for the new placement:
>
> * add amdgpu_mmio_remap_bo_init()/fini()
> * in amdgpu_ttm_init(): initialize AMDGPU_PL_MMIO_REMAP heap and create
>   the PAGE_SIZE BO
> * in amdgpu_ttm_fini(): drop BO and tear down the range manager
>
> This isolates lifetime management and error paths for the remap BO and
> ties them into the TTM bring-up/teardown flow.
>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 86 +++++++++++++++++++++++++
>  1 file changed, 86 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 157a5416a826..ab93fbec2a34 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1859,6 +1859,73 @@ static void amdgpu_ttm_pools_fini(struct amdgpu_device *adev)
>         adev->mman.ttm_pools = NULL;
>  }
>
> +/* ================= MMIO remap (HDP flush) singleton BO ================= */
> +static int amdgpu_mmio_remap_bo_init(struct amdgpu_device *adev)

Prefix this function with amdgpu_ttm_ for consistency.

> +{
> +       resource_size_t bar_base, bar_len, bus, off;
> +       int r;
> +
> +       /* The ASIC code should have set this to the absolute bus address
> +        * of the remap page (inside the register BAR).
> +        */
> +       bus = adev->rmmio_remap.bus_addr;

Just remove adev->rmmio_remap.bus_addr and use the new
adev->mmio_remap.base that you added.  We don't need two copies.

if the base is 0, then we can just return 0 here.  We can't allocate
the buffer if the PAGE_SIZE is > 4K.

> +       if (!bus) {
> +               dev_dbg(adev->dev, "MMIO_REMAP: no remap bus addr; skipping BO\n");
> +               return -ENODEV;
> +       }
> +
> +       /* The register BAR base/size were established in amdgpu_device_init() */
> +       bar_base = adev->rmmio_base;
> +       bar_len  = adev->rmmio_size;
> +
> +       /* Sanity: page must lie wholly inside the register BAR */
> +       if (bus < bar_base || (bus + PAGE_SIZE) > (bar_base + bar_len)) {
> +               dev_err(adev->dev,
> +                       "MMIO_REMAP: bus 0x%llx not in REG BAR [0x%llx..0x%llx)\n",
> +                       (unsigned long long)bus,
> +                       (unsigned long long)bar_base,
> +                       (unsigned long long)(bar_base + bar_len));
> +               return -ERANGE;
> +       }
> +
> +       off = bus - bar_base;
> +       if (!IS_ALIGNED(off, PAGE_SIZE)) {
> +               dev_err(adev->dev, "MMIO_REMAP: offset 0x%llx not page-aligned\n",
> +                       (unsigned long long)off);
> +               return -EINVAL;
> +       }

All of this can be dropped.

> +
> +       /* Create exactly ONE kernel-owned BO in the MMIO_REMAP domain */
> +       r = amdgpu_bo_create_kernel(adev,
> +                                   PAGE_SIZE,                 /* bo_size  */
> +                                   PAGE_SIZE,                 /* alignment*/
> +                                   AMDGPU_GEM_DOMAIN_MMIO_REMAP,
> +                                   &adev->mmio_remap_bo,
> +                                   NULL, NULL);

You can probably just call this directly below rather than adding a
wrapper function.

> +       if (r) {
> +               dev_err(adev->dev, "MMIO_REMAP: BO create failed (%d)\n", r);
> +               return r;
> +       }
> +
> +       dev_dbg(adev->dev,
> +               "MMIO_REMAP: base=0x%llx off=0x%llx size=0x%lx (BO created)\n",
> +               (unsigned long long)adev->mmio_remap_base,
> +               (unsigned long long)adev->mmio_remap_offset,
> +               (unsigned long)adev->mmio_remap_size);
> +
> +       return 0;
> +}
> +
> +static void amdgpu_mmio_remap_bo_fini(struct amdgpu_device *adev)
> +{
> +
> +       if (adev->mmio_remap_bo)
> +               amdgpu_bo_free_kernel(&adev->mmio_remap_bo, NULL, NULL);
> +       adev->mmio_remap_bo = NULL;

Same here.

> +
> +       return;
> +}
> +
>  /*
>   * amdgpu_ttm_init - Init the memory management (ttm) as well as various
>   * gtt/vram related fields.
> @@ -2026,6 +2093,20 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
>                 return r;
>         }
>
> +       /* Initialize MMIO-remap pool (single page) */
> +       r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_MMIO_REMAP, 1);
> +       if (r) {
> +               dev_err(adev->dev, "Failed initializing MMIO-remap heap.\n");
> +               return r;
> +       }
> +
> +       /* Create the singleton MMIO-remap BO (one page) */
> +       r = amdgpu_mmio_remap_bo_init(adev);
> +       if (r) {
> +               dev_err(adev->dev, "Failed to create MMIO-remap singleton BO.\n");
> +               return r;
> +       }

This could be split into a separate patch.  One patch to create the
heap and a separate patch to allocate the BO.

> +
>         /* Initialize preemptible memory pool */
>         r = amdgpu_preempt_mgr_init(adev);
>         if (r) {
> @@ -2088,6 +2169,9 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
>         }
>         amdgpu_bo_free_kernel(&adev->mman.sdma_access_bo, NULL,
>                                         &adev->mman.sdma_access_ptr);
> +
> +       /* === Drop the singleton MMIO-remap BO === */

Drop this comment.

> +       amdgpu_mmio_remap_bo_fini(adev);
>         amdgpu_ttm_fw_reserve_vram_fini(adev);
>         amdgpu_ttm_drv_reserve_vram_fini(adev);
>
> @@ -2109,6 +2193,8 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
>         ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GWS);
>         ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_OA);
>         ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_DOORBELL);
> +       /* Tear down the tiny range manager for MMIO-remap */

Drop this comment.

Alex

> +       ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_MMIO_REMAP);
>         ttm_device_fini(&adev->mman.bdev);
>         adev->mman.initialized = false;
>         dev_info(adev->dev, "amdgpu: ttm finalized\n");
> --
> 2.34.1
>

Re: [RFC PATCH 7/7] drm/amdgpu: Return Handle to MMIO_REMAP Singleton for GEM Create

[Alex Deucher]

On Wed, Aug 20, 2025 at 7:43 AM Srinivasan Shanmugam
<srinivasan.shanmugam@amd.com> wrote:
>
> When userspace requests a GEM in AMDGPU_GEM_DOMAIN_MMIO_REMAP, return a
> handle to the kernel-owned singleton BO instead of allocating a new one.
>
> Validate inputs (exact PAGE_SIZE, alignment PAGE_SIZE, no extra flags)
> and zero the ioctl out-struct on success for a clean echo.
>
> This puts the userspace-visible behavior last, after all internal kernel
> plumbing and initialization are in place.
>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 56 +++++++++++++++++++++++++
>  1 file changed, 56 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> index e3f65977eeee..1345e81214e8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> @@ -424,6 +424,26 @@ const struct drm_gem_object_funcs amdgpu_gem_object_funcs = {
>         .vm_ops = &amdgpu_gem_vm_ops,
>  };
>
> +/* ========= MMIO remap (HDP flush) GEM handle helper ========= */
> +static int amdgpu_gem_get_mmio_remap_handle(struct drm_file *file_priv,
> +                                           struct amdgpu_device *adev,
> +                                           u32 *handle)
> +{
> +       struct amdgpu_bo *bo = adev->mmio_remap_bo;
> +       struct drm_gem_object *gobj;
> +       int r;
> +
> +       if (!bo)
> +               return -ENODEV;
> +
> +       /* Take a temporary ref; the handle creation will hold its own ref. */
> +       bo = amdgpu_bo_ref(bo);
> +       gobj = &bo->tbo.base;
> +       r = drm_gem_handle_create(file_priv, gobj, handle);
> +       amdgpu_bo_unref(&bo);  /* drops our temporary ref */
> +       return r;
> +}
> +
>  /*
>   * GEM ioctls.
>   */
> @@ -465,6 +485,42 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
>         /* always clear VRAM */
>         flags |= AMDGPU_GEM_CREATE_VRAM_CLEARED;
>
> +       /*
> +        * === MMIO remap (HDP flush) fast-path ===
> +        * If userspace asks for the MMIO_REMAP domain, don't allocate a new BO.
> +        * Return a handle to the singleton BO created at device init.
> +        */
> +       if (args->in.domains & AMDGPU_GEM_DOMAIN_MMIO_REMAP) {
> +               u32 mmio_handle;

Can drop this and just use handle from the top of this function.

> +               /* Enforce fixed size & alignment (exactly one page). */

This needs to check that the PAGE_SIZE is 4K.  E.g.,

If (PAGE_SIZE > 4096)
    return -EINVAL;

Alex

> +               if (size && size != PAGE_SIZE)
> +                       return -EINVAL;
> +               if (args->in.alignment && args->in.alignment != PAGE_SIZE)
> +                       return -EINVAL;
> +               /* No extra domain flags for this special object. */
> +               if (args->in.domain_flags)
> +                       return -EINVAL;
> +               /* Disallow flags that don't make sense for a fixed I/O page. */
> +               if (flags & (AMDGPU_GEM_CREATE_CPU_GTT_USWC |
> +                            AMDGPU_GEM_CREATE_ENCRYPTED |
> +                            AMDGPU_GEM_CREATE_DISCARDABLE))

I think all flags would be irrelevant in this case.

> +                       return -EINVAL;
> +
> +               /* Normalize inputs (optional, for user-visible echo/debug). */
> +               args->in.bo_size     = PAGE_SIZE;
> +               args->in.alignment   = PAGE_SIZE;
> +               args->in.domains     = AMDGPU_GEM_DOMAIN_MMIO_REMAP;
> +               args->in.domain_flags = 0;

Why are you setting all of these?

Alex

> +
> +               r = amdgpu_gem_get_mmio_remap_handle(filp, adev, &mmio_handle);
> +               if (r)
> +                       return r;
> +
> +               memset(args, 0, sizeof(*args));
> +               args->out.handle = mmio_handle;
> +               return 0;
> +       }
> +
>         /* create a gem object to contain this object in */
>         if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |
>             AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
> --
> 2.34.1
>

Re: [RFC PATCH 1/7] drm/amdgpu/uapi: add AMDGPU_GEM_DOMAIN_MMIO_REMAP

[Alex Deucher]

On Wed, Aug 20, 2025 at 7:43 AM Srinivasan Shanmugam
<srinivasan.shanmugam@amd.com> wrote:
>
> Add a new GEM domain bit AMDGPU_GEM_DOMAIN_MMIO_REMAP to allow
> userspace to request the MMIO remap (HDP flush) page via GEM_CREATE.
>
> - include/uapi/drm/amdgpu_drm.h:
>   * define AMDGPU_GEM_DOMAIN_MMIO_REMAP
>   * include the bit in AMDGPU_GEM_DOMAIN_MASK
>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>

This patch should probably also add a check to
amdgpu_gem_create_ioctl() which rejects the
AMDGPU_GEM_DOMAIN_MMIO_REMAP domain for now and then drop that in your
last patch.

Alex

> ---
>  include/uapi/drm/amdgpu_drm.h | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index bdedbaccf776..fc44e301adbb 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -103,6 +103,8 @@ extern "C" {
>   *
>   * %AMDGPU_GEM_DOMAIN_DOORBELL Doorbell. It is an MMIO region for
>   * signalling user mode queues.
> + *
> + * %AMDGPU_GEM_DOMAIN_MMIO_REMAP       MMIO remap page (special mapping for HDP flushing).
>   */
>  #define AMDGPU_GEM_DOMAIN_CPU          0x1
>  #define AMDGPU_GEM_DOMAIN_GTT          0x2
> @@ -111,13 +113,15 @@ extern "C" {
>  #define AMDGPU_GEM_DOMAIN_GWS          0x10
>  #define AMDGPU_GEM_DOMAIN_OA           0x20
>  #define AMDGPU_GEM_DOMAIN_DOORBELL     0x40
> +#define AMDGPU_GEM_DOMAIN_MMIO_REMAP   0x80
>  #define AMDGPU_GEM_DOMAIN_MASK         (AMDGPU_GEM_DOMAIN_CPU | \
>                                          AMDGPU_GEM_DOMAIN_GTT | \
>                                          AMDGPU_GEM_DOMAIN_VRAM | \
>                                          AMDGPU_GEM_DOMAIN_GDS | \
>                                          AMDGPU_GEM_DOMAIN_GWS | \
> -                                        AMDGPU_GEM_DOMAIN_OA | \
> -                                        AMDGPU_GEM_DOMAIN_DOORBELL)
> +                                        AMDGPU_GEM_DOMAIN_OA | \
> +                                        AMDGPU_GEM_DOMAIN_DOORBELL | \
> +                                        AMDGPU_GEM_DOMAIN_MMIO_REMAP)
>
>  /* Flag that CPU access will be required for the case of VRAM domain */
>  #define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED  (1 << 0)
> --
> 2.34.1
>

Re: [RFC PATCH 0/7] drm/amdgpu: add MMIO-remap singleton BO for HDP flush

[Alex Deucher]

On Wed, Aug 20, 2025 at 7:58 AM Srinivasan Shanmugam
<srinivasan.shanmugam@amd.com> wrote:
>
> This series introduces a kernel-managed singleton BO representing the
> MMIO-remap (HDP flush) page and exposes it to userspace through a new
> GEM domain.
>
> Design ------
> - A tiny (1-page) TTM bucket is introduced for AMDGPU_PL_MMIO_REMAP
>   (mirroring doorbells).
> - A singleton BO is created during amdgpu_ttm_init() and freed at
>   fini().
> - The BO is kernel-owned and never evicted.
> - amdgpu_gem_create_ioctl() recognizes the new GEM domain bit
>   (AMDGPU_GEM_DOMAIN_MMIO_REMAP) and returns a handle to the pre-created
> singleton BO, enforcing size/alignment checks.
> - Userspace thus gets a stable GEM handle and can mmap it to issue HDP
>   flushes.
>
> * Only compilation tested so far (x86_64, defconfig + amdgpu enabled).
> * No runtime validation yet.
>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
>
> Srinivasan Shanmugam (7):
>   drm/amdgpu/uapi: add AMDGPU_GEM_DOMAIN_MMIO_REMAP
>   drm/amdgpu: Add New TTM Placement - AMDGPU_PL_MMIO_REMAP and wire up
>     plumbing
>   drm/amdgpu: Plumbing for MMIO_REMAP memtype and user-visible strings
>   drm/amdgpu: Add mmio_remap fields to amdgpu_device
>   drm/amdgpu: Implement TTM handling for MMIO_REMAP placement
>   drm/amdgpu: Create Singleton MMIO_REMAP BO and Initialize its pool
>   drm/amdgpu: Return Handle to MMIO_REMAP Singleton for GEM Create

You also need a patch which sets adev->mmio_remap.base and
adev->mmio_remap.size.
E.g.,

adev->mmio_remap.base = adev->rmmio_remap.bus_addr;
adev->mmio_remap.size = 4096;

Better yet, replace adev->rmmio_remap.bus_addr with
adev->mmio_remap.base and just use that everywhere.

Alex

>
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h           |   7 ++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c    |   1 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c       |  56 +++++++++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c    |  13 ++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.h    |   2 +
>  .../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h    |   2 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c       | 112 +++++++++++++++++-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h       |   3 +-
>  include/drm/ttm/ttm_resource.h                |   2 +-
>  include/uapi/drm/amdgpu_drm.h                 |   8 +-
>  10 files changed, 198 insertions(+), 8 deletions(-)
>
> --
> 2.34.1
>

RE: [RFC PATCH 4/7] drm/amdgpu: Add mmio_remap fields to amdgpu_device

[Deucher, Alexander]

[Public]

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Deucher,
> Alexander
> Sent: Wednesday, August 20, 2025 5:08 PM
> To: SHANMUGAM, SRINIVASAN <SRINIVASAN.SHANMUGAM@amd.com>;
> Koenig, Christian <Christian.Koenig@amd.com>
> Cc: amd-gfx@lists.freedesktop.org
> Subject: RE: [RFC PATCH 4/7] drm/amdgpu: Add mmio_remap fields to
> amdgpu_device
>
> [Public]
>
> > -----Original Message-----
> > From: SHANMUGAM, SRINIVASAN <SRINIVASAN.SHANMUGAM@amd.com>
> > Sent: Wednesday, August 20, 2025 7:33 AM
> > To: Koenig, Christian <Christian.Koenig@amd.com>; Deucher, Alexander
> > <Alexander.Deucher@amd.com>
> > Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
> > <SRINIVASAN.SHANMUGAM@amd.com>
> > Subject: [RFC PATCH 4/7] drm/amdgpu: Add mmio_remap fields to
> > amdgpu_device
> >
> > Add bookkeeping for the remap page to struct amdgpu_device:
> >
> > * mmio_remap_bo (singleton BO)
> > * mmio_remap_base, mmio_remap_barsz (register BAR base/size)
> > * mmio_remap_offset (BAR-relative offset of the remap page)
> > * mmio_remap_size (PAGE_SIZE)
> >
> > Cc: Christian König <christian.koenig@amd.com>
> > Cc: Alex Deucher <alexander.deucher@amd.com>
> > Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu.h | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > index ddd472e56f69..6c477596617b 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > @@ -1038,6 +1038,13 @@ struct amdgpu_device {
> >       amdgpu_block_wreg_t             audio_endpt_wreg;
> >       struct amdgpu_doorbell          doorbell;
> >
> > +     /* ===== MMIO remap (HDP flush) bookkeeping ===== */
> > +     struct amdgpu_bo                *mmio_remap_bo;   /* singleton BO */
> > +     resource_size_t                  mmio_remap_base;  /* REG BAR bus base */
> > +     resource_size_t                  mmio_remap_barsz; /* REG BAR size */
> > +     resource_size_t                  mmio_remap_offset;/* BAR-relative offset of
> > remap page */
> > +     resource_size_t                  mmio_remap_size;  /* always PAGE_SIZE */
>
>
> Also maybe put these in their own struct, similar to what we do for doorbells and
> drop the mmio_remap prefix.  E.g.,
>
> struct amdgpu_mmio_remap.{
>     resource_size_t base;
>     resource_size_t size
>     struct amdgpu_bo;
> };
>

Actually we already have struct amdgpu_mmio_remap.  Just update that structure.

Alex


> Alex
>
> > +
> >       /* clock/pll info */
> >       struct amdgpu_clock            clock;
> >
> > --
> > 2.34.1

Re: [RFC PATCH 4/7] drm/amdgpu: Add mmio_remap fields to amdgpu_device

[Christian König]

On 20.08.25 23:00, Deucher, Alexander wrote:
> [Public]
> 
>> -----Original Message-----
>> From: SHANMUGAM, SRINIVASAN <SRINIVASAN.SHANMUGAM@amd.com>
>> Sent: Wednesday, August 20, 2025 7:33 AM
>> To: Koenig, Christian <Christian.Koenig@amd.com>; Deucher, Alexander
>> <Alexander.Deucher@amd.com>
>> Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
>> <SRINIVASAN.SHANMUGAM@amd.com>
>> Subject: [RFC PATCH 4/7] drm/amdgpu: Add mmio_remap fields to amdgpu_device
>>
>> Add bookkeeping for the remap page to struct amdgpu_device:
>>
>> * mmio_remap_bo (singleton BO)
>> * mmio_remap_base, mmio_remap_barsz (register BAR base/size)
>> * mmio_remap_offset (BAR-relative offset of the remap page)
>> * mmio_remap_size (PAGE_SIZE)
> 
> It's not PAGE_SIZE it's 4K.  If the PAGE_SIZE is >4K on the system, then we can't support this.

Please use AMDGPU_PAGE_SIZE for all defines, it should be 4k for current GPU HW generations.

Regards,
Christian.

> 
>>
>> Cc: Christian König <christian.koenig@amd.com>
>> Cc: Alex Deucher <alexander.deucher@amd.com>
>> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
>> ---
>>  drivers/gpu/drm/amd/amdgpu/amdgpu.h | 7 +++++++
>>  1 file changed, 7 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> index ddd472e56f69..6c477596617b 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> @@ -1038,6 +1038,13 @@ struct amdgpu_device {
>>       amdgpu_block_wreg_t             audio_endpt_wreg;
>>       struct amdgpu_doorbell          doorbell;
>>
>> +     /* ===== MMIO remap (HDP flush) bookkeeping ===== */
>> +     struct amdgpu_bo                *mmio_remap_bo;   /* singleton BO */
>> +     resource_size_t                  mmio_remap_base;  /* REG BAR bus base */
>> +     resource_size_t                  mmio_remap_barsz; /* REG BAR size */
>> +     resource_size_t                  mmio_remap_offset;/* BAR-relative offset of
>> remap page */
>> +     resource_size_t                  mmio_remap_size;  /* always PAGE_SIZE */
> 
> Always 4K.
> 
> Alex
> 
> 
>> +
>>       /* clock/pll info */
>>       struct amdgpu_clock            clock;
>>
>> --
>> 2.34.1
> 

[RFC PATCH v2 0/8] drm/amdgpu: Add MMIO-remap Singleton BO for HDP flush

[Srinivasan Shanmugam]

This series introduces a kernel-managed singleton BO representing the
MMIO-remap (HDP flush) page and exposes it to userspace through a new
GEM domain.

Design
------
- A tiny (1-page) TTM bucket is introduced for AMDGPU_PL_MMIO_REMAP
  (mirroring doorbells).
- A singleton BO is created during amdgpu_ttm_init() and freed at
  fini().
- The BO is kernel-owned and never evicted.
- amdgpu_gem_create_ioctl() recognizes the new GEM domain bit
  (AMDGPU_GEM_DOMAIN_MMIO_REMAP) and returns a handle to the pre-created
singleton BO, enforcing size/alignment checks.
- Userspace thus gets a stable GEM handle and can mmap it to issue HDP
  flushes.

v2: Updated review comments from v1. (Alex/Christian)

* Only compilation tested so far (x86_64, defconfig + amdgpu enabled).

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>

Srinivasan Shanmugam (8):
  drm/amdgpu/uapi: Introduce AMDGPU_GEM_DOMAIN_MMIO_REMAP
  drm/amdgpu/ttm: Add New AMDGPU_PL_MMIO_REMAP Placement
  drm/amdgpu: Wire up MMIO_REMAP placement and User-visible strings
  drm/amdgpu: Add mmio_remap bookkeeping to amdgpu_device
  drm/amdgpu: Implement TTM handling for MMIO_REMAP placement
  drm/amdgpu/ttm: Initialize AMDGPU_PL_MMIO_REMAP Heap
  drm/amdgpu/ttm: Allocate/Free 4K MMIO_REMAP Singleton BO
  drm/amdgpu/gem: Return Handle to MMIO_REMAP Singleton in GEM_CREATE

 drivers/gpu/drm/amd/amdgpu/amdgpu.h           |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c    |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c       | 62 ++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c    | 13 +++
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h    |  2 +
 .../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h    |  2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c       | 96 ++++++++++++++++++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h       |  3 +-
 include/drm/ttm/ttm_resource.h                |  2 +-
 include/uapi/drm/amdgpu_drm.h                 |  8 +-
 10 files changed, 183 insertions(+), 7 deletions(-)


base-commit: 6b70b6008d812a9a210455dd55459a21279bad1e
-- 
2.34.1

[RFC PATCH v2 1/8] drm/amdgpu/uapi: Introduce AMDGPU_GEM_DOMAIN_MMIO_REMAP

[Srinivasan Shanmugam]

Add a new GEM domain bit AMDGPU_GEM_DOMAIN_MMIO_REMAP to allow
userspace to request the MMIO remap (HDP flush) page via GEM_CREATE.

- include/uapi/drm/amdgpu_drm.h:
  * define AMDGPU_GEM_DOMAIN_MMIO_REMAP
  * include the bit in AMDGPU_GEM_DOMAIN_MASK

v2: Add early reject in amdgpu_gem_create_ioctl() (Alex).

Cc: Christian König <christian.koenig@amd.com>
Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 3 +++
 include/uapi/drm/amdgpu_drm.h           | 8 ++++++--
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index e3f65977eeee..d8cffd26455b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -464,6 +464,9 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
 
 	/* always clear VRAM */
 	flags |= AMDGPU_GEM_CREATE_VRAM_CLEARED;
+	
+	if (args->in.domains & AMDGPU_GEM_DOMAIN_MMIO_REMAP)
+		return -EINVAL;
 
 	/* create a gem object to contain this object in */
 	if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index bdedbaccf776..fc44e301adbb 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -103,6 +103,8 @@ extern "C" {
  *
  * %AMDGPU_GEM_DOMAIN_DOORBELL	Doorbell. It is an MMIO region for
  * signalling user mode queues.
+ *
+ * %AMDGPU_GEM_DOMAIN_MMIO_REMAP	MMIO remap page (special mapping for HDP flushing).
  */
 #define AMDGPU_GEM_DOMAIN_CPU		0x1
 #define AMDGPU_GEM_DOMAIN_GTT		0x2
@@ -111,13 +113,15 @@ extern "C" {
 #define AMDGPU_GEM_DOMAIN_GWS		0x10
 #define AMDGPU_GEM_DOMAIN_OA		0x20
 #define AMDGPU_GEM_DOMAIN_DOORBELL	0x40
+#define AMDGPU_GEM_DOMAIN_MMIO_REMAP	0x80
 #define AMDGPU_GEM_DOMAIN_MASK		(AMDGPU_GEM_DOMAIN_CPU | \
 					 AMDGPU_GEM_DOMAIN_GTT | \
 					 AMDGPU_GEM_DOMAIN_VRAM | \
 					 AMDGPU_GEM_DOMAIN_GDS | \
 					 AMDGPU_GEM_DOMAIN_GWS | \
-					 AMDGPU_GEM_DOMAIN_OA | \
-					 AMDGPU_GEM_DOMAIN_DOORBELL)
+					 AMDGPU_GEM_DOMAIN_OA |	\
+					 AMDGPU_GEM_DOMAIN_DOORBELL | \
+					 AMDGPU_GEM_DOMAIN_MMIO_REMAP)
 
 /* Flag that CPU access will be required for the case of VRAM domain */
 #define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED	(1 << 0)
-- 
2.34.1

[RFC PATCH v2 2/8] drm/amdgpu/ttm: Add New AMDGPU_PL_MMIO_REMAP Placement

[Srinivasan Shanmugam]

Introduce a kernel-internal TTM placement type AMDGPU_PL_MMIO_REMAP
for the HDP flush MMIO remap page

Plumbing added:
- amdgpu_res_cursor.{first,next}: treat MMIO_REMAP like DOORBELL
- amdgpu_ttm_io_mem_reserve(): return BAR bus address + offset
  for MMIO_REMAP, mark as uncached I/O
- amdgpu_ttm_io_mem_pfn(): PFN from register BAR
- amdgpu_res_cpu_visible(): visible to CPU
- amdgpu_evict_flags()/amdgpu_bo_move(): non-migratable
- amdgpu_ttm_tt_pde_flags(): map as SYSTEM
- amdgpu_bo_mem_stats_placement(): report AMDGPU_PL_MMIO_REMAP
- amdgpu_fdinfo: print “mmioremap” bucket label

Notes:
- This patch bumps __AMDGPU_PL_NUM and (for now) TTM_NUM_MEM_TYPES to
  avoid compile-time guards.

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 ++-
 include/drm/ttm/ttm_resource.h          | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 2309df3f68a9..bb17987f0447 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -34,7 +34,8 @@
 #define AMDGPU_PL_OA		(TTM_PL_PRIV + 2)
 #define AMDGPU_PL_PREEMPT	(TTM_PL_PRIV + 3)
 #define AMDGPU_PL_DOORBELL	(TTM_PL_PRIV + 4)
-#define __AMDGPU_PL_NUM	(TTM_PL_PRIV + 5)
+#define AMDGPU_PL_MMIO_REMAP	(TTM_PL_PRIV + 5)
+#define __AMDGPU_PL_NUM	(TTM_PL_PRIV + 6)
 
 #define AMDGPU_GTT_MAX_TRANSFER_SIZE	512
 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS	2
diff --git a/include/drm/ttm/ttm_resource.h b/include/drm/ttm/ttm_resource.h
index e52bba15012f..f49daa504c36 100644
--- a/include/drm/ttm/ttm_resource.h
+++ b/include/drm/ttm/ttm_resource.h
@@ -36,7 +36,7 @@
 #include <drm/ttm/ttm_kmap_iter.h>
 
 #define TTM_MAX_BO_PRIORITY	4U
-#define TTM_NUM_MEM_TYPES 8
+#define TTM_NUM_MEM_TYPES 9
 
 struct dmem_cgroup_device;
 struct ttm_device;
-- 
2.34.1

[RFC PATCH v2 3/8] drm/amdgpu: Wire up MMIO_REMAP placement and User-visible strings

[Srinivasan Shanmugam]

Wire up the conversions and strings for the new MMIO_REMAP placement:

* amdgpu_mem_type_to_domain() maps AMDGPU_PL_MMIO_REMAP -> domain
* amdgpu_bo_placement_from_domain() accepts the new domain
* amdgpu_bo_mem_stats_placement() and amdgpu_bo_print_info() report it
* res cursor supports the new placement
* fdinfo prints "mmioremap" for the new placement

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c     |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c     | 13 +++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h     |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h |  2 ++
 4 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
index 91d638098889..b349bb3676d5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
@@ -70,6 +70,7 @@ void amdgpu_show_fdinfo(struct drm_printer *p, struct drm_file *file)
 		[AMDGPU_PL_GWS] = "gws",
 		[AMDGPU_PL_OA] = "oa",
 		[AMDGPU_PL_DOORBELL] = "doorbell",
+		[AMDGPU_PL_MMIO_REMAP] = "mmioremap",
 	};
 	unsigned int hw_ip, i;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 122a88294883..fe486988a738 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -153,6 +153,14 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
 		c++;
 	}
 
+	if (domain & AMDGPU_GEM_DOMAIN_MMIO_REMAP) {
+		places[c].fpfn = 0;
+		places[c].lpfn = 0;
+		places[c].mem_type = AMDGPU_PL_MMIO_REMAP;
+		places[c].flags = 0;
+		c++;
+	}
+
 	if (domain & AMDGPU_GEM_DOMAIN_GTT) {
 		places[c].fpfn = 0;
 		places[c].lpfn = 0;
@@ -1545,6 +1553,8 @@ uint32_t amdgpu_bo_mem_stats_placement(struct amdgpu_bo *bo)
 		return AMDGPU_PL_OA;
 	case AMDGPU_GEM_DOMAIN_DOORBELL:
 		return AMDGPU_PL_DOORBELL;
+	case AMDGPU_GEM_DOMAIN_MMIO_REMAP:
+		return AMDGPU_PL_MMIO_REMAP;
 	default:
 		return TTM_PL_SYSTEM;
 	}
@@ -1628,6 +1638,9 @@ u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m)
 			case AMDGPU_PL_DOORBELL:
 				placement = "DOORBELL";
 				break;
+			case AMDGPU_PL_MMIO_REMAP:
+				placement = "MMIO REMAP";
+				break;
 			case TTM_PL_SYSTEM:
 			default:
 				placement = "CPU";
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 87523fcd4386..656b8a931dae 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -167,6 +167,8 @@ static inline unsigned amdgpu_mem_type_to_domain(u32 mem_type)
 		return AMDGPU_GEM_DOMAIN_OA;
 	case AMDGPU_PL_DOORBELL:
 		return AMDGPU_GEM_DOMAIN_DOORBELL;
+	case AMDGPU_PL_MMIO_REMAP:
+		return AMDGPU_GEM_DOMAIN_MMIO_REMAP;
 	default:
 		break;
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
index 50fcd86e1033..be2e56ce1355 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
@@ -91,6 +91,7 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
 		break;
 	case TTM_PL_TT:
 	case AMDGPU_PL_DOORBELL:
+	case AMDGPU_PL_MMIO_REMAP:
 		node = to_ttm_range_mgr_node(res)->mm_nodes;
 		while (start >= node->size << PAGE_SHIFT)
 			start -= node++->size << PAGE_SHIFT;
@@ -153,6 +154,7 @@ static inline void amdgpu_res_next(struct amdgpu_res_cursor *cur, uint64_t size)
 		break;
 	case TTM_PL_TT:
 	case AMDGPU_PL_DOORBELL:
+	case AMDGPU_PL_MMIO_REMAP:
 		node = cur->node;
 
 		cur->node = ++node;
-- 
2.34.1

[RFC PATCH v2 4/8] drm/amdgpu: Add mmio_remap bookkeeping to amdgpu_device

[Srinivasan Shanmugam]

Add bookkeeping for the remap page to struct amdgpu_device:

* bo:	kernel-owned singleton BO

v2:
- Use existing amdgpu_mmio_remap container; remove per-field members
  (Alex).
- Use AMD_GPU_PAGE_SIZE (always 4K) per Christian/Alex.

Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Suggested-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ddd472e56f69..24501d3fbefe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -752,6 +752,7 @@ typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t, u
 struct amdgpu_mmio_remap {
 	u32 reg_offset;
 	resource_size_t bus_addr;
+	struct amdgpu_bo *bo;
 };
 
 /* Define the HW IP blocks will be used in driver , add more if necessary */
-- 
2.34.1

[RFC PATCH v2 5/8] drm/amdgpu: Implement TTM handling for MMIO_REMAP placement

[Srinivasan Shanmugam]

Implement TTM-level behavior for AMDGPU_PL_MMIO_REMAP so it behaves as a
CPU-visible IO page:

* amdgpu_evict_flags(): mark as unmovable
* amdgpu_res_cpu_visible(): consider CPU-visible
* amdgpu_bo_move(): use null move when src/dst is MMIO_REMAP
* amdgpu_ttm_io_mem_reserve(): program base/is_iomem/caching using
  the device's mmio_remap_* metadata
* amdgpu_ttm_io_mem_pfn(): return PFN for the remapped HDP page
* amdgpu_ttm_tt_pde_flags(): set AMDGPU_PTE_SYSTEM for this mem type

v2:
- Drop HDP-specific comment; keep generic remap (Alex).
- Use adev->rmmio_base; remove base+offset math (Alex).

Cc: Christian König <christian.koenig@amd.com>
Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 27ab4e754b2a..f6027ccd9196 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -123,6 +123,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
 	case AMDGPU_PL_GWS:
 	case AMDGPU_PL_OA:
 	case AMDGPU_PL_DOORBELL:
+	case AMDGPU_PL_MMIO_REMAP:
 		placement->num_placement = 0;
 		return;
 
@@ -447,7 +448,8 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev,
 		return false;
 
 	if (res->mem_type == TTM_PL_SYSTEM || res->mem_type == TTM_PL_TT ||
-	    res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL)
+	    res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL ||
+		res->mem_type == AMDGPU_PL_MMIO_REMAP)
 		return true;
 
 	if (res->mem_type != TTM_PL_VRAM)
@@ -538,10 +540,12 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
 	    old_mem->mem_type == AMDGPU_PL_GWS ||
 	    old_mem->mem_type == AMDGPU_PL_OA ||
 	    old_mem->mem_type == AMDGPU_PL_DOORBELL ||
+	    old_mem->mem_type == AMDGPU_PL_MMIO_REMAP ||
 	    new_mem->mem_type == AMDGPU_PL_GDS ||
 	    new_mem->mem_type == AMDGPU_PL_GWS ||
 	    new_mem->mem_type == AMDGPU_PL_OA ||
-	    new_mem->mem_type == AMDGPU_PL_DOORBELL) {
+	    new_mem->mem_type == AMDGPU_PL_DOORBELL ||
+	    new_mem->mem_type == AMDGPU_PL_MMIO_REMAP) {
 		/* Nothing to save here */
 		amdgpu_bo_move_notify(bo, evict, new_mem);
 		ttm_bo_move_null(bo, new_mem);
@@ -629,6 +633,12 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
 		mem->bus.is_iomem = true;
 		mem->bus.caching = ttm_uncached;
 		break;
+	case AMDGPU_PL_MMIO_REMAP:
+		mem->bus.offset = mem->start << PAGE_SHIFT;
+		mem->bus.offset += adev->rmmio_base;
+		mem->bus.is_iomem = true;
+		mem->bus.caching = ttm_uncached;
+		break;
 	default:
 		return -EINVAL;
 	}
@@ -646,6 +656,8 @@ static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
 
 	if (bo->resource->mem_type == AMDGPU_PL_DOORBELL)
 		return ((uint64_t)(adev->doorbell.base + cursor.start)) >> PAGE_SHIFT;
+	else if (bo->resource->mem_type == AMDGPU_PL_MMIO_REMAP)
+		return ((uint64_t)(adev->rmmio_base + cursor.start)) >> PAGE_SHIFT;
 
 	return (adev->gmc.aper_base + cursor.start) >> PAGE_SHIFT;
 }
@@ -1355,7 +1367,7 @@ uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem)
 
 	if (mem && (mem->mem_type == TTM_PL_TT ||
 		    mem->mem_type == AMDGPU_PL_DOORBELL ||
-		    mem->mem_type == AMDGPU_PL_PREEMPT)) {
+		    mem->mem_type == AMDGPU_PL_PREEMPT || mem->mem_type == AMDGPU_PL_MMIO_REMAP)) {
 		flags |= AMDGPU_PTE_SYSTEM;
 
 		if (ttm->caching == ttm_cached)
-- 
2.34.1

[RFC PATCH v2 6/8] drm/amdgpu/ttm: Initialize AMDGPU_PL_MMIO_REMAP Heap

[Srinivasan Shanmugam]

Add a one-page TTM range manager for AMDGPU_PL_MMIO_REMAP via
amdgpu_ttm_init_on_chip(). This only registers the placement with TTM;
no BO is allocated in this patch.

The singleton 4K remap BO is created and freed in the following patch.

This split follows to separate heap bring-up from BO allocation.

Cc: Christian König <christian.koenig@amd.com>
Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index f6027ccd9196..58b6ab1be4c1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -2020,6 +2020,13 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
 		return r;
 	}
 
+	/* Initialize MMIO-remap pool (single page 4K) */
+	r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_MMIO_REMAP, 1);
+	if (r) {
+		dev_err(adev->dev, "Failed initializing MMIO-remap heap.\n");
+		return r;
+	}
+
 	/* Initialize preemptible memory pool */
 	r = amdgpu_preempt_mgr_init(adev);
 	if (r) {
@@ -2082,6 +2089,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
 	}
 	amdgpu_bo_free_kernel(&adev->mman.sdma_access_bo, NULL,
 					&adev->mman.sdma_access_ptr);
+
 	amdgpu_ttm_fw_reserve_vram_fini(adev);
 	amdgpu_ttm_drv_reserve_vram_fini(adev);
 
@@ -2103,6 +2111,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
 	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GWS);
 	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_OA);
 	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_DOORBELL);
+	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_MMIO_REMAP);
 	ttm_device_fini(&adev->mman.bdev);
 	adev->mman.initialized = false;
 	dev_info(adev->dev, "amdgpu: ttm finalized\n");
-- 
2.34.1

[RFC PATCH v2 7/8] drm/amdgpu/ttm: Allocate/Free 4K MMIO_REMAP Singleton BO

[Srinivasan Shanmugam]

Add amdgpu_ttm_mmio_remap_bo_init()/fini() to manage the kernel-owned
one-page(4K) MMIO_REMAP BO. The allocator runs during TTM init when the
hardware exposes a remap base (adev->rmmio_base) and the host
PAGE_SIZE is <= AMDGPU_GPU_PAGE_SIZE (4K).

The helper is idempotent (returns 0 if already allocated) and only
returns an error when the actual allocation fails.

This keeps MMIO_REMAP lifetime handling localized and prepares for the
subsequent patch that exposes a userspace handle.

Cc: Christian König <christian.koenig@amd.com>
Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 69 +++++++++++++++++++++++++
 1 file changed, 69 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 58b6ab1be4c1..c76c41a312b0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1853,6 +1853,68 @@ static void amdgpu_ttm_pools_fini(struct amdgpu_device *adev)
 	adev->mman.ttm_pools = NULL;
 }
 
+/**
+ * amdgpu_ttm_mmio_remap_bo_init - allocate the singleton 4K MMIO_REMAP BO
+ * @adev: amdgpu device
+ *
+ * Allocates the kernel-owned one-page buffer in AMDGPU_GEM_DOMAIN_MMIO_REMAP
+ * when the hardware exposes a remap base (adev->rmmio_remap.base) and the host
+ * PAGE_SIZE is <= AMDGPU_GPU_PAGE_SIZE (4K). If either condition is not met, the
+ * function returns 0 and leaves adev->rmmio_remap.bo as NULL.
+ *
+ * If the BO is already allocated, the function does nothing and returns 0.
+ * Only errors during actual allocation (e.g., amdgpu_bo_create_kernel()) are
+ * propagated as negative returns.
+ *
+ * Return:
+ *  * 0 on success or intentional skip (feature not present/unsupported)
+ *  * negative errno on allocation failure
+ */
+static int amdgpu_ttm_mmio_remap_bo_init(struct amdgpu_device *adev)
+{
+	int r;
+
+	if (!adev->rmmio_base)
+		return 0;
+
+	/* Hardware remap page is fixed 4K; skip on larger PAGE_SIZE. */
+	if (PAGE_SIZE > AMDGPU_GPU_PAGE_SIZE) {
+		dev_warn(adev->dev, "MMIO_REMAP disabled: PAGE_SIZE=%lu > 4K\n", PAGE_SIZE);
+		return 0;
+	}
+
+	if (adev->rmmio_remap.bo)
+		return 0;
+
+	/* Create exactly ONE kernel-owned BO in the MMIO_REMAP domain */
+	r = amdgpu_bo_create_kernel(adev,
+				    AMDGPU_GPU_PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE,
+				    AMDGPU_GEM_DOMAIN_MMIO_REMAP,
+				    &adev->rmmio_remap.bo,
+				    NULL, NULL);
+	if (r) {
+		dev_err(adev->dev, "MMIO_REMAP: BO create failed (%d)\n", r);
+		return r;
+	}
+
+	return 0;
+}
+
+/**
+ * amdgpu_ttm_mmio_remap_bo_fini - free the singleton MMIO_REMAP BO
+ * @adev: amdgpu device
+ *
+ * Frees the kernel-owned MMIO_REMAP BO if it was allocated by
+ * amdgpu_ttm_mmio_remap_bo_init().
+ */
+static void amdgpu_ttm_mmio_remap_bo_fini(struct amdgpu_device *adev)
+{
+	if (adev->rmmio_remap.bo) {
+		amdgpu_bo_free_kernel(&adev->rmmio_remap.bo, NULL, NULL);
+		adev->rmmio_remap.bo = NULL;
+	}
+}
+
 /*
  * amdgpu_ttm_init - Init the memory management (ttm) as well as various
  * gtt/vram related fields.
@@ -2027,6 +2089,11 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
 		return r;
 	}
 
+	/* Allocate the singleton MMIO_REMAP BO (4K) if supported */
+	r = amdgpu_ttm_mmio_remap_bo_init(adev);
+	if (r)
+		return r;
+
 	/* Initialize preemptible memory pool */
 	r = amdgpu_preempt_mgr_init(adev);
 	if (r) {
@@ -2090,6 +2157,8 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
 	amdgpu_bo_free_kernel(&adev->mman.sdma_access_bo, NULL,
 					&adev->mman.sdma_access_ptr);
 
+	/* Drop the singleton MMIO_REMAP BO (if allocated) */
+	amdgpu_ttm_mmio_remap_bo_fini(adev);
 	amdgpu_ttm_fw_reserve_vram_fini(adev);
 	amdgpu_ttm_drv_reserve_vram_fini(adev);
 
-- 
2.34.1

[RFC PATCH v2 8/8] drm/amdgpu/gem: Return Handle to MMIO_REMAP Singleton in GEM_CREATE

[Srinivasan Shanmugam]

Enable userspace to obtain a handle to the kernel-owned MMIO_REMAP
singleton when AMDGPU_GEM_DOMAIN_MMIO_REMAP is requested via
amdgpu_gem_create_ioctl().

Validate the fixed 4K constraint: if PAGE_SIZE > AMDGPU_GPU_PAGE_SIZE
return -EINVAL; when provided, size and alignment must equal
AMDGPU_GPU_PAGE_SIZE.

If the singleton BO is not available, return -ENODEV.

Cc: Christian König <christian.koenig@amd.com>
Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 59 +++++++++++++++++++++++++
 1 file changed, 59 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index d8cffd26455b..655281f57a99 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -424,6 +424,38 @@ const struct drm_gem_object_funcs amdgpu_gem_object_funcs = {
 	.vm_ops = &amdgpu_gem_vm_ops,
 };
 
+/**
+ * amdgpu_gem_get_mmio_remap_handle - Create a GEM handle for the MMIO_REMAP BO
+ * @file_priv: DRM file corresponding to the calling process
+ * @adev: amdgpu device
+ * @handle: returned userspace GEM handle (out)
+ *
+ * Creates a GEM handle to the kernel-owned singleton MMIO_REMAP buffer object
+ * (adev->rmmio_remap.bo). The BO is expected to be allocated during TTM init
+ * when the hardware exposes a remap base and PAGE_SIZE <= 4K.
+ *
+ * drm_gem_handle_create() acquires the handle reference, which will be dropped
+ * by GEM_CLOSE in userspace.
+ *
+ * * Return:
+ * * 0 on success
+ * * -ENODEV if the MMIO_REMAP BO is not available
+ * * A negative errno from drm_gem_handle_create() on failure
+ *
+ */
+static int amdgpu_gem_get_mmio_remap_handle(struct drm_file *file_priv,
+					    struct amdgpu_device *adev,
+					    u32 *handle)
+{
+	struct amdgpu_bo *bo = READ_ONCE(adev->rmmio_remap.bo);
+
+	if (!bo)
+		return -ENODEV;
+
+	/* drm_gem_handle_create() gets the ref; GEM_CLOSE drops it */
+	return drm_gem_handle_create(file_priv, &bo->tbo.base, handle);
+}
+
 /*
  * GEM ioctls.
  */
@@ -468,6 +500,33 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
 	if (args->in.domains & AMDGPU_GEM_DOMAIN_MMIO_REMAP)
 		return -EINVAL;
 
+	/*
+	 * === MMIO remap (HDP flush) fast-path ===
+	 * If userspace asks for the MMIO_REMAP domain, don't allocate a new BO.
+	 * Return a handle to the singleton BO created at ttm init.
+	 */
+	if (args->in.domains & AMDGPU_GEM_DOMAIN_MMIO_REMAP) {
+		/*
+		 * The MMIO remap page is fixed 4K on the GPU side. Do not
+		 * allow use if the system PAGE_SIZE is larger than the GPU
+		 * page size.
+		 */
+		if (PAGE_SIZE > AMDGPU_GPU_PAGE_SIZE)
+			return -EINVAL;
+
+		/* Enforce fixed size/alignment when provided by userspace. */
+		if (size && size != AMDGPU_GPU_PAGE_SIZE)
+			return -EINVAL;
+		if (args->in.alignment && args->in.alignment != AMDGPU_GPU_PAGE_SIZE)
+			return -EINVAL;
+
+		r = amdgpu_gem_get_mmio_remap_handle(filp, adev, &handle);
+		if (r)
+			return r;
+		args->out.handle = handle;
+		return 0;
+	}
+
 	/* create a gem object to contain this object in */
 	if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |
 	    AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
-- 
2.34.1

Re: [RFC PATCH 2/7] drm/amdgpu: Add New TTM Placement - AMDGPU_PL_MMIO_REMAP and wire up plumbing

[Christian König]

On 20.08.25 13:32, Srinivasan Shanmugam wrote:
> Introduce a kernel-internal TTM placement type AMDGPU_PL_MMIO_REMAP
> for the HDP flush MMIO remap page
> 
> Plumbing added:
> - amdgpu_res_cursor.{first,next}: treat MMIO_REMAP like DOORBELL
> - amdgpu_ttm_io_mem_reserve(): return BAR bus address + offset
>   for MMIO_REMAP, mark as uncached I/O
> - amdgpu_ttm_io_mem_pfn(): PFN from register BAR
> - amdgpu_res_cpu_visible(): visible to CPU
> - amdgpu_evict_flags()/amdgpu_bo_move(): non-migratable
> - amdgpu_ttm_tt_pde_flags(): map as SYSTEM
> - amdgpu_bo_mem_stats_placement(): report AMDGPU_PL_MMIO_REMAP
> - amdgpu_fdinfo: print “mmioremap” bucket label
> 
> Notes:
> - This patch bumps __AMDGPU_PL_NUM and (for now) TTM_NUM_MEM_TYPES to
>   avoid compile-time guards.
> 
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 ++-
>  include/drm/ttm/ttm_resource.h          | 2 +-
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> index 2309df3f68a9..bb17987f0447 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> @@ -34,7 +34,8 @@
>  #define AMDGPU_PL_OA		(TTM_PL_PRIV + 2)
>  #define AMDGPU_PL_PREEMPT	(TTM_PL_PRIV + 3)
>  #define AMDGPU_PL_DOORBELL	(TTM_PL_PRIV + 4)
> -#define __AMDGPU_PL_NUM	(TTM_PL_PRIV + 5)
> +#define AMDGPU_PL_MMIO_REMAP	(TTM_PL_PRIV + 5)
> +#define __AMDGPU_PL_NUM	(TTM_PL_PRIV + 6)
>  
>  #define AMDGPU_GTT_MAX_TRANSFER_SIZE	512
>  #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS	2
> diff --git a/include/drm/ttm/ttm_resource.h b/include/drm/ttm/ttm_resource.h
> index e52bba15012f..f49daa504c36 100644
> --- a/include/drm/ttm/ttm_resource.h
> +++ b/include/drm/ttm/ttm_resource.h
> @@ -36,7 +36,7 @@
>  #include <drm/ttm/ttm_kmap_iter.h>
>  
>  #define TTM_MAX_BO_PRIORITY	4U
> -#define TTM_NUM_MEM_TYPES 8
> +#define TTM_NUM_MEM_TYPES 9

Please make that a separate patch.

Thanks,
Christian

>  
>  struct dmem_cgroup_device;
>  struct ttm_device;

Re: [RFC PATCH 4/7] drm/amdgpu: Add mmio_remap fields to amdgpu_device

[Christian König]

On 20.08.25 13:32, Srinivasan Shanmugam wrote:
> Add bookkeeping for the remap page to struct amdgpu_device:
> 
> * mmio_remap_bo (singleton BO)
> * mmio_remap_base, mmio_remap_barsz (register BAR base/size)
> * mmio_remap_offset (BAR-relative offset of the remap page)
> * mmio_remap_size (PAGE_SIZE)
> 
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index ddd472e56f69..6c477596617b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1038,6 +1038,13 @@ struct amdgpu_device {
>  	amdgpu_block_wreg_t		audio_endpt_wreg;
>  	struct amdgpu_doorbell		doorbell;
>  
> +	/* ===== MMIO remap (HDP flush) bookkeeping ===== */

Please don't use === for comments. Rather make that proper kerneldoc.

> +	struct amdgpu_bo		*mmio_remap_bo;   /* singleton BO */
> +	resource_size_t 		 mmio_remap_base;  /* REG BAR bus base */
> +	resource_size_t 		 mmio_remap_barsz; /* REG BAR size */
> +	resource_size_t 		 mmio_remap_offset;/* BAR-relative offset of remap page */
> +	resource_size_t 		 mmio_remap_size;  /* always PAGE_SIZE */

And no comment after members please, see kerneldoc for proper style.

Thanks,
Christian.

> +
>  	/* clock/pll info */
>  	struct amdgpu_clock            clock;
>  

Re: [RFC PATCH 5/7] drm/amdgpu: Implement TTM handling for MMIO_REMAP placement

[Christian König]

On 20.08.25 13:32, Srinivasan Shanmugam wrote:
> Implement TTM-level behavior for AMDGPU_PL_MMIO_REMAP so it behaves
> as a CPU-visible IO page:
> 
> * amdgpu_evict_flags(): mark as unmovable
> * amdgpu_res_cpu_visible(): consider CPU-visible
> * amdgpu_bo_move(): use null move when src/dst is MMIO_REMAP
> * amdgpu_ttm_io_mem_reserve(): program bus.offset/is_iomem/caching using
>   the device's mmio_remap_* metadata
> * amdgpu_ttm_io_mem_pfn(): return PFN for the remapped HDP page
> * amdgpu_ttm_tt_pde_flags(): set AMDGPU_PTE_SYSTEM for this mem type
> 
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 26 +++++++++++++++++++++----
>  1 file changed, 22 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 27ab4e754b2a..157a5416a826 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -123,6 +123,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
>  	case AMDGPU_PL_GWS:
>  	case AMDGPU_PL_OA:
>  	case AMDGPU_PL_DOORBELL:
> +	case AMDGPU_PL_MMIO_REMAP:
>  		placement->num_placement = 0;
>  		return;
>  
> @@ -447,7 +448,8 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev,
>  		return false;
>  
>  	if (res->mem_type == TTM_PL_SYSTEM || res->mem_type == TTM_PL_TT ||
> -	    res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL)
> +	    res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL ||
> +		res->mem_type == AMDGPU_PL_MMIO_REMAP)

The indentation here is a bit of, you should probably check your editor config.

Apart from that looks good to me.

Regards,
Christian.

>  		return true;
>  
>  	if (res->mem_type != TTM_PL_VRAM)
> @@ -538,10 +540,12 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
>  	    old_mem->mem_type == AMDGPU_PL_GWS ||
>  	    old_mem->mem_type == AMDGPU_PL_OA ||
>  	    old_mem->mem_type == AMDGPU_PL_DOORBELL ||
> +	    old_mem->mem_type == AMDGPU_PL_MMIO_REMAP ||
>  	    new_mem->mem_type == AMDGPU_PL_GDS ||
>  	    new_mem->mem_type == AMDGPU_PL_GWS ||
>  	    new_mem->mem_type == AMDGPU_PL_OA ||
> -	    new_mem->mem_type == AMDGPU_PL_DOORBELL) {
> +	    new_mem->mem_type == AMDGPU_PL_DOORBELL ||
> +	    new_mem->mem_type == AMDGPU_PL_MMIO_REMAP) {
>  		/* Nothing to save here */
>  		amdgpu_bo_move_notify(bo, evict, new_mem);
>  		ttm_bo_move_null(bo, new_mem);
> @@ -629,6 +633,12 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
>  		mem->bus.is_iomem = true;
>  		mem->bus.caching = ttm_uncached;
>  		break;
> +	case AMDGPU_PL_MMIO_REMAP:  /* <=== New HDP domain for remap page */
> +		mem->bus.offset  = ((resource_size_t)mem->start << PAGE_SHIFT);
> +		mem->bus.offset += adev->mmio_remap_base + adev->mmio_remap_offset;
> +		mem->bus.is_iomem = true;
> +		mem->bus.caching = ttm_uncached;
> +		break;
>  	default:
>  		return -EINVAL;
>  	}
> @@ -640,12 +650,20 @@ static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
>  {
>  	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
>  	struct amdgpu_res_cursor cursor;
> +	u64 pfn;
>  
>  	amdgpu_res_first(bo->resource, (u64)page_offset << PAGE_SHIFT, 0,
>  			 &cursor);
>  
> -	if (bo->resource->mem_type == AMDGPU_PL_DOORBELL)
> +	if (bo->resource->mem_type == AMDGPU_PL_DOORBELL) {
>  		return ((uint64_t)(adev->doorbell.base + cursor.start)) >> PAGE_SHIFT;
> +	} else if (bo->resource->mem_type == AMDGPU_PL_MMIO_REMAP) {
> +		/* Return PFN for the remapped HDP page */
> +		pfn = (u64)adev->mmio_remap_base +
> +			(u64)adev->mmio_remap_offset +
> +			(u64)cursor.start;
> +		return (unsigned long)(pfn >> PAGE_SHIFT);
> +	}
>  
>  	return (adev->gmc.aper_base + cursor.start) >> PAGE_SHIFT;
>  }
> @@ -1355,7 +1373,7 @@ uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem)
>  
>  	if (mem && (mem->mem_type == TTM_PL_TT ||
>  		    mem->mem_type == AMDGPU_PL_DOORBELL ||
> -		    mem->mem_type == AMDGPU_PL_PREEMPT)) {
> +		    mem->mem_type == AMDGPU_PL_PREEMPT || mem->mem_type == AMDGPU_PL_MMIO_REMAP)) {
>  		flags |= AMDGPU_PTE_SYSTEM;
>  
>  		if (ttm->caching == ttm_cached)

Re: [RFC PATCH 6/7] drm/amdgpu: Create Singleton MMIO_REMAP BO and Initialize its pool

[Christian König]

On 20.08.25 13:32, Srinivasan Shanmugam wrote:
> Create the single-page MMIO_REMAP BO and initialize a tiny on-chip
> range manager for the new placement:
> 
> * add amdgpu_mmio_remap_bo_init()/fini()
> * in amdgpu_ttm_init(): initialize AMDGPU_PL_MMIO_REMAP heap and create
>   the PAGE_SIZE BO
> * in amdgpu_ttm_fini(): drop BO and tear down the range manager
> 
> This isolates lifetime management and error paths for the remap BO and
> ties them into the TTM bring-up/teardown flow.
> 
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 86 +++++++++++++++++++++++++
>  1 file changed, 86 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 157a5416a826..ab93fbec2a34 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1859,6 +1859,73 @@ static void amdgpu_ttm_pools_fini(struct amdgpu_device *adev)
>  	adev->mman.ttm_pools = NULL;
>  }
>  
> +/* ================= MMIO remap (HDP flush) singleton BO ================= */

Please drop those =, either use kerneldoc a just a comment.

> +static int amdgpu_mmio_remap_bo_init(struct amdgpu_device *adev)
> +{
> +	resource_size_t bar_base, bar_len, bus, off;
> +	int r;
> +
> +	/* The ASIC code should have set this to the absolute bus address
> +	 * of the remap page (inside the register BAR).
> +	 */
> +	bus = adev->rmmio_remap.bus_addr;
> +	if (!bus) {
> +		dev_dbg(adev->dev, "MMIO_REMAP: no remap bus addr; skipping BO\n");
> +		return -ENODEV;
> +	}
> +
> +	/* The register BAR base/size were established in amdgpu_device_init() */
> +	bar_base = adev->rmmio_base;
> +	bar_len  = adev->rmmio_size;
> +
> +	/* Sanity: page must lie wholly inside the register BAR */
> +	if (bus < bar_base || (bus + PAGE_SIZE) > (bar_base + bar_len)) {
> +		dev_err(adev->dev,
> +			"MMIO_REMAP: bus 0x%llx not in REG BAR [0x%llx..0x%llx)\n",
> +			(unsigned long long)bus,
> +			(unsigned long long)bar_base,
> +			(unsigned long long)(bar_base + bar_len));
> +		return -ERANGE;
> +	}
> +
> +	off = bus - bar_base;
> +	if (!IS_ALIGNED(off, PAGE_SIZE)) {
> +		dev_err(adev->dev, "MMIO_REMAP: offset 0x%llx not page-aligned\n",
> +			(unsigned long long)off);
> +		return -EINVAL;
> +	}
> +

Please drop all that. The code here should not check anything but just creates the BO at the specific location.

> +	/* Create exactly ONE kernel-owned BO in the MMIO_REMAP domain */
> +	r = amdgpu_bo_create_kernel(adev,
> +				    PAGE_SIZE,                 /* bo_size  */
> +				    PAGE_SIZE,                 /* alignment*/
> +				    AMDGPU_GEM_DOMAIN_MMIO_REMAP,
> +				    &adev->mmio_remap_bo,
> +				    NULL, NULL);

That won't work like this. The difference between a kernel and an userspace BO is that kernel BOs can't be mapped into userspace.

You need to use amdgpu_bo_create() here, lock it and kmap it manually.

> +	if (r) {
> +		dev_err(adev->dev, "MMIO_REMAP: BO create failed (%d)\n", r);
> +		return r;
> +	}
> +
> +	dev_dbg(adev->dev,
> +		"MMIO_REMAP: base=0x%llx off=0x%llx size=0x%lx (BO created)\n",
> +		(unsigned long long)adev->mmio_remap_base,
> +		(unsigned long long)adev->mmio_remap_offset,
> +		(unsigned long)adev->mmio_remap_size);
> +
> +	return 0;
> +}
> +
> +static void amdgpu_mmio_remap_bo_fini(struct amdgpu_device *adev)
> +{
> +
> +	if (adev->mmio_remap_bo)

Drop that check.

Regards,
Christian.

> +		amdgpu_bo_free_kernel(&adev->mmio_remap_bo, NULL, NULL);
> +	adev->mmio_remap_bo = NULL;
> +
> +	return;
> +}
> +
>  /*
>   * amdgpu_ttm_init - Init the memory management (ttm) as well as various
>   * gtt/vram related fields.
> @@ -2026,6 +2093,20 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
>  		return r;
>  	}
>  
> +	/* Initialize MMIO-remap pool (single page) */
> +	r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_MMIO_REMAP, 1);
> +	if (r) {
> +		dev_err(adev->dev, "Failed initializing MMIO-remap heap.\n");
> +		return r;
> +	}
> +
> +	/* Create the singleton MMIO-remap BO (one page) */
> +	r = amdgpu_mmio_remap_bo_init(adev);
> +	if (r) {
> +		dev_err(adev->dev, "Failed to create MMIO-remap singleton BO.\n");
> +		return r;
> +	}
> +
>  	/* Initialize preemptible memory pool */
>  	r = amdgpu_preempt_mgr_init(adev);
>  	if (r) {
> @@ -2088,6 +2169,9 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
>  	}
>  	amdgpu_bo_free_kernel(&adev->mman.sdma_access_bo, NULL,
>  					&adev->mman.sdma_access_ptr);
> +
> +	/* === Drop the singleton MMIO-remap BO === */
> +	amdgpu_mmio_remap_bo_fini(adev);
>  	amdgpu_ttm_fw_reserve_vram_fini(adev);
>  	amdgpu_ttm_drv_reserve_vram_fini(adev);
>  
> @@ -2109,6 +2193,8 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
>  	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GWS);
>  	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_OA);
>  	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_DOORBELL);
> +	/* Tear down the tiny range manager for MMIO-remap */
> +	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_MMIO_REMAP);
>  	ttm_device_fini(&adev->mman.bdev);
>  	adev->mman.initialized = false;
>  	dev_info(adev->dev, "amdgpu: ttm finalized\n");

Re: [RFC PATCH v2 5/8] drm/amdgpu: Implement TTM handling for MMIO_REMAP placement

[Alex Deucher]

On Sat, Aug 23, 2025 at 3:28 AM Srinivasan Shanmugam
<srinivasan.shanmugam@amd.com> wrote:
>
> Implement TTM-level behavior for AMDGPU_PL_MMIO_REMAP so it behaves as a
> CPU-visible IO page:
>
> * amdgpu_evict_flags(): mark as unmovable
> * amdgpu_res_cpu_visible(): consider CPU-visible
> * amdgpu_bo_move(): use null move when src/dst is MMIO_REMAP
> * amdgpu_ttm_io_mem_reserve(): program base/is_iomem/caching using
>   the device's mmio_remap_* metadata
> * amdgpu_ttm_io_mem_pfn(): return PFN for the remapped HDP page
> * amdgpu_ttm_tt_pde_flags(): set AMDGPU_PTE_SYSTEM for this mem type
>
> v2:
> - Drop HDP-specific comment; keep generic remap (Alex).
> - Use adev->rmmio_base; remove base+offset math (Alex).
>
> Cc: Christian König <christian.koenig@amd.com>
> Suggested-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 18 +++++++++++++++---
>  1 file changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 27ab4e754b2a..f6027ccd9196 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -123,6 +123,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
>         case AMDGPU_PL_GWS:
>         case AMDGPU_PL_OA:
>         case AMDGPU_PL_DOORBELL:
> +       case AMDGPU_PL_MMIO_REMAP:
>                 placement->num_placement = 0;
>                 return;
>
> @@ -447,7 +448,8 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev,
>                 return false;
>
>         if (res->mem_type == TTM_PL_SYSTEM || res->mem_type == TTM_PL_TT ||
> -           res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL)
> +           res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL ||
> +               res->mem_type == AMDGPU_PL_MMIO_REMAP)
>                 return true;
>
>         if (res->mem_type != TTM_PL_VRAM)
> @@ -538,10 +540,12 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
>             old_mem->mem_type == AMDGPU_PL_GWS ||
>             old_mem->mem_type == AMDGPU_PL_OA ||
>             old_mem->mem_type == AMDGPU_PL_DOORBELL ||
> +           old_mem->mem_type == AMDGPU_PL_MMIO_REMAP ||
>             new_mem->mem_type == AMDGPU_PL_GDS ||
>             new_mem->mem_type == AMDGPU_PL_GWS ||
>             new_mem->mem_type == AMDGPU_PL_OA ||
> -           new_mem->mem_type == AMDGPU_PL_DOORBELL) {
> +           new_mem->mem_type == AMDGPU_PL_DOORBELL ||
> +           new_mem->mem_type == AMDGPU_PL_MMIO_REMAP) {
>                 /* Nothing to save here */
>                 amdgpu_bo_move_notify(bo, evict, new_mem);
>                 ttm_bo_move_null(bo, new_mem);
> @@ -629,6 +633,12 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
>                 mem->bus.is_iomem = true;
>                 mem->bus.caching = ttm_uncached;
>                 break;
> +       case AMDGPU_PL_MMIO_REMAP:
> +               mem->bus.offset = mem->start << PAGE_SHIFT;
> +               mem->bus.offset += adev->rmmio_base;

This is wrong.  It needs to be adev->rmmio_remap.bus_addr.

> +               mem->bus.is_iomem = true;
> +               mem->bus.caching = ttm_uncached;
> +               break;
>         default:
>                 return -EINVAL;
>         }
> @@ -646,6 +656,8 @@ static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
>
>         if (bo->resource->mem_type == AMDGPU_PL_DOORBELL)
>                 return ((uint64_t)(adev->doorbell.base + cursor.start)) >> PAGE_SHIFT;
> +       else if (bo->resource->mem_type == AMDGPU_PL_MMIO_REMAP)
> +               return ((uint64_t)(adev->rmmio_base + cursor.start)) >> PAGE_SHIFT;

Same here.

Alex

>
>         return (adev->gmc.aper_base + cursor.start) >> PAGE_SHIFT;
>  }
> @@ -1355,7 +1367,7 @@ uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem)
>
>         if (mem && (mem->mem_type == TTM_PL_TT ||
>                     mem->mem_type == AMDGPU_PL_DOORBELL ||
> -                   mem->mem_type == AMDGPU_PL_PREEMPT)) {
> +                   mem->mem_type == AMDGPU_PL_PREEMPT || mem->mem_type == AMDGPU_PL_MMIO_REMAP)) {
>                 flags |= AMDGPU_PTE_SYSTEM;
>
>                 if (ttm->caching == ttm_cached)
> --
> 2.34.1
>

Re: [RFC PATCH v2 5/8] drm/amdgpu: Implement TTM handling for MMIO_REMAP placement

[Alex Deucher]

On Mon, Aug 25, 2025 at 10:52 AM Alex Deucher <alexdeucher@gmail.com> wrote:
>
> On Sat, Aug 23, 2025 at 3:28 AM Srinivasan Shanmugam
> <srinivasan.shanmugam@amd.com> wrote:
> >
> > Implement TTM-level behavior for AMDGPU_PL_MMIO_REMAP so it behaves as a
> > CPU-visible IO page:
> >
> > * amdgpu_evict_flags(): mark as unmovable
> > * amdgpu_res_cpu_visible(): consider CPU-visible
> > * amdgpu_bo_move(): use null move when src/dst is MMIO_REMAP
> > * amdgpu_ttm_io_mem_reserve(): program base/is_iomem/caching using
> >   the device's mmio_remap_* metadata
> > * amdgpu_ttm_io_mem_pfn(): return PFN for the remapped HDP page
> > * amdgpu_ttm_tt_pde_flags(): set AMDGPU_PTE_SYSTEM for this mem type
> >
> > v2:
> > - Drop HDP-specific comment; keep generic remap (Alex).
> > - Use adev->rmmio_base; remove base+offset math (Alex).
> >
> > Cc: Christian König <christian.koenig@amd.com>
> > Suggested-by: Alex Deucher <alexander.deucher@amd.com>
> > Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 18 +++++++++++++++---
> >  1 file changed, 15 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > index 27ab4e754b2a..f6027ccd9196 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > @@ -123,6 +123,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
> >         case AMDGPU_PL_GWS:
> >         case AMDGPU_PL_OA:
> >         case AMDGPU_PL_DOORBELL:
> > +       case AMDGPU_PL_MMIO_REMAP:
> >                 placement->num_placement = 0;
> >                 return;
> >
> > @@ -447,7 +448,8 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev,
> >                 return false;
> >
> >         if (res->mem_type == TTM_PL_SYSTEM || res->mem_type == TTM_PL_TT ||
> > -           res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL)
> > +           res->mem_type == AMDGPU_PL_PREEMPT || res->mem_type == AMDGPU_PL_DOORBELL ||
> > +               res->mem_type == AMDGPU_PL_MMIO_REMAP)
> >                 return true;
> >
> >         if (res->mem_type != TTM_PL_VRAM)
> > @@ -538,10 +540,12 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
> >             old_mem->mem_type == AMDGPU_PL_GWS ||
> >             old_mem->mem_type == AMDGPU_PL_OA ||
> >             old_mem->mem_type == AMDGPU_PL_DOORBELL ||
> > +           old_mem->mem_type == AMDGPU_PL_MMIO_REMAP ||
> >             new_mem->mem_type == AMDGPU_PL_GDS ||
> >             new_mem->mem_type == AMDGPU_PL_GWS ||
> >             new_mem->mem_type == AMDGPU_PL_OA ||
> > -           new_mem->mem_type == AMDGPU_PL_DOORBELL) {
> > +           new_mem->mem_type == AMDGPU_PL_DOORBELL ||
> > +           new_mem->mem_type == AMDGPU_PL_MMIO_REMAP) {
> >                 /* Nothing to save here */
> >                 amdgpu_bo_move_notify(bo, evict, new_mem);
> >                 ttm_bo_move_null(bo, new_mem);
> > @@ -629,6 +633,12 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
> >                 mem->bus.is_iomem = true;
> >                 mem->bus.caching = ttm_uncached;
> >                 break;
> > +       case AMDGPU_PL_MMIO_REMAP:
> > +               mem->bus.offset = mem->start << PAGE_SHIFT;
> > +               mem->bus.offset += adev->rmmio_base;
>
> This is wrong.  It needs to be adev->rmmio_remap.bus_addr.

mem->bus.offset += adev->rmmio_remap.bus_addr;

>
> > +               mem->bus.is_iomem = true;
> > +               mem->bus.caching = ttm_uncached;
> > +               break;
> >         default:
> >                 return -EINVAL;
> >         }
> > @@ -646,6 +656,8 @@ static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
> >
> >         if (bo->resource->mem_type == AMDGPU_PL_DOORBELL)
> >                 return ((uint64_t)(adev->doorbell.base + cursor.start)) >> PAGE_SHIFT;
> > +       else if (bo->resource->mem_type == AMDGPU_PL_MMIO_REMAP)
> > +               return ((uint64_t)(adev->rmmio_base + cursor.start)) >> PAGE_SHIFT;
>
> Same here.
>

return ((uint64_t)(adev->rmmio_remap.bus_addr + cursor.start)) >> PAGE_SHIFT;

Alex

> Alex
>
> >
> >         return (adev->gmc.aper_base + cursor.start) >> PAGE_SHIFT;
> >  }
> > @@ -1355,7 +1367,7 @@ uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem)
> >
> >         if (mem && (mem->mem_type == TTM_PL_TT ||
> >                     mem->mem_type == AMDGPU_PL_DOORBELL ||
> > -                   mem->mem_type == AMDGPU_PL_PREEMPT)) {
> > +                   mem->mem_type == AMDGPU_PL_PREEMPT || mem->mem_type == AMDGPU_PL_MMIO_REMAP)) {
> >                 flags |= AMDGPU_PTE_SYSTEM;
> >
> >                 if (ttm->caching == ttm_cached)
> > --
> > 2.34.1
> >

Re: [RFC PATCH 7/7] drm/amdgpu: Return Handle to MMIO_REMAP Singleton for GEM Create

[Christian König]

On 20.08.25 13:32, Srinivasan Shanmugam wrote:
> When userspace requests a GEM in AMDGPU_GEM_DOMAIN_MMIO_REMAP, return a
> handle to the kernel-owned singleton BO instead of allocating a new one.
> 
> Validate inputs (exact PAGE_SIZE, alignment PAGE_SIZE, no extra flags)
> and zero the ioctl out-struct on success for a clean echo.
> 
> This puts the userspace-visible behavior last, after all internal kernel
> plumbing and initialization are in place.
> 
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 56 +++++++++++++++++++++++++
>  1 file changed, 56 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> index e3f65977eeee..1345e81214e8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> @@ -424,6 +424,26 @@ const struct drm_gem_object_funcs amdgpu_gem_object_funcs = {
>  	.vm_ops = &amdgpu_gem_vm_ops,
>  };
>  
> +/* ========= MMIO remap (HDP flush) GEM handle helper ========= */
> +static int amdgpu_gem_get_mmio_remap_handle(struct drm_file *file_priv,
> +					    struct amdgpu_device *adev,
> +					    u32 *handle)
> +{
> +	struct amdgpu_bo *bo = adev->mmio_remap_bo;
> +	struct drm_gem_object *gobj;
> +	int r;
> +
> +	if (!bo)
> +		return -ENODEV;
> +
> +	/* Take a temporary ref; the handle creation will hold its own ref. */
> +	bo = amdgpu_bo_ref(bo);

That is superflous, you can just call drm_gem_handle_create().

> +	gobj = &bo->tbo.base;
> +	r = drm_gem_handle_create(file_priv, gobj, handle);
> +	amdgpu_bo_unref(&bo);  /* drops our temporary ref */
> +	return r;
> +}
> +
>  /*
>   * GEM ioctls.
>   */
> @@ -465,6 +485,42 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
>  	/* always clear VRAM */
>  	flags |= AMDGPU_GEM_CREATE_VRAM_CLEARED;
>  
> +	/*
> +	 * === MMIO remap (HDP flush) fast-path ===
> +	 * If userspace asks for the MMIO_REMAP domain, don't allocate a new BO.
> +	 * Return a handle to the singleton BO created at device init.
> +	 */
> +	if (args->in.domains & AMDGPU_GEM_DOMAIN_MMIO_REMAP) {
> +		u32 mmio_handle;
> +		/* Enforce fixed size & alignment (exactly one page). */
> +		if (size && size != PAGE_SIZE)
> +			return -EINVAL;
> +		if (args->in.alignment && args->in.alignment != PAGE_SIZE)
> +			return -EINVAL;
> +		/* No extra domain flags for this special object. */
> +		if (args->in.domain_flags)
> +			return -EINVAL;
> +		/* Disallow flags that don't make sense for a fixed I/O page. */
> +		if (flags & (AMDGPU_GEM_CREATE_CPU_GTT_USWC |
> +			     AMDGPU_GEM_CREATE_ENCRYPTED |
> +			     AMDGPU_GEM_CREATE_DISCARDABLE))
> +			return -EINVAL;
> +
> +		/* Normalize inputs (optional, for user-visible echo/debug). */

> +		args->in.bo_size     = PAGE_SIZE;
> +		args->in.alignment   = PAGE_SIZE;
> +		args->in.domains     = AMDGPU_GEM_DOMAIN_MMIO_REMAP;
> +		args->in.domain_flags = 0;
> +

That makes not much sense, the in parameters are meaningless at this point.

Regards,
Christian.

> +		r = amdgpu_gem_get_mmio_remap_handle(filp, adev, &mmio_handle);
> +		if (r)
> +			return r;
> +
> +		memset(args, 0, sizeof(*args));
> +		args->out.handle = mmio_handle;
> +		return 0;
> +	}
> +
>  	/* create a gem object to contain this object in */
>  	if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |
>  	    AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {

Re: [RFC PATCH 0/7] drm/amdgpu: add MMIO-remap singleton BO for HDP flush

[Christian König]

On 20.08.25 13:32, Srinivasan Shanmugam wrote:
> This series introduces a kernel-managed singleton BO representing the
> MMIO-remap (HDP flush) page and exposes it to userspace through a new
> GEM domain.
> 
> Design ------
> - A tiny (1-page) TTM bucket is introduced for AMDGPU_PL_MMIO_REMAP
>   (mirroring doorbells).
> - A singleton BO is created during amdgpu_ttm_init() and freed at
>   fini().
> - The BO is kernel-owned and never evicted.
> - amdgpu_gem_create_ioctl() recognizes the new GEM domain bit
>   (AMDGPU_GEM_DOMAIN_MMIO_REMAP) and returns a handle to the pre-created
> singleton BO, enforcing size/alignment checks.
> - Userspace thus gets a stable GEM handle and can mmap it to issue HDP
>   flushes.
> 
> * Only compilation tested so far (x86_64, defconfig + amdgpu enabled).
> * No runtime validation yet.
> 
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>

Patch #1, #3 Reviewed-by: Christian König <christian.koenig@amd.com>

The rest needs some more work.

Regards,
Christian.

> Srinivasan Shanmugam (7):
>   drm/amdgpu/uapi: add AMDGPU_GEM_DOMAIN_MMIO_REMAP
>   drm/amdgpu: Add New TTM Placement - AMDGPU_PL_MMIO_REMAP and wire up
>     plumbing
>   drm/amdgpu: Plumbing for MMIO_REMAP memtype and user-visible strings
>   drm/amdgpu: Add mmio_remap fields to amdgpu_device
>   drm/amdgpu: Implement TTM handling for MMIO_REMAP placement
>   drm/amdgpu: Create Singleton MMIO_REMAP BO and Initialize its pool
>   drm/amdgpu: Return Handle to MMIO_REMAP Singleton for GEM Create
> 
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h           |   7 ++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c    |   1 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c       |  56 +++++++++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c    |  13 ++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.h    |   2 +
>  .../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h    |   2 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c       | 112 +++++++++++++++++-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h       |   3 +-
>  include/drm/ttm/ttm_resource.h                |   2 +-
>  include/uapi/drm/amdgpu_drm.h                 |   8 +-
>  10 files changed, 198 insertions(+), 8 deletions(-)
> 

Re: [RFC PATCH v2 7/8] drm/amdgpu/ttm: Allocate/Free 4K MMIO_REMAP Singleton BO

[Alex Deucher]

On Sat, Aug 23, 2025 at 3:20 AM Srinivasan Shanmugam
<srinivasan.shanmugam@amd.com> wrote:
>
> Add amdgpu_ttm_mmio_remap_bo_init()/fini() to manage the kernel-owned
> one-page(4K) MMIO_REMAP BO. The allocator runs during TTM init when the
> hardware exposes a remap base (adev->rmmio_base) and the host
> PAGE_SIZE is <= AMDGPU_GPU_PAGE_SIZE (4K).
>
> The helper is idempotent (returns 0 if already allocated) and only
> returns an error when the actual allocation fails.
>
> This keeps MMIO_REMAP lifetime handling localized and prepares for the
> subsequent patch that exposes a userspace handle.
>
> Cc: Christian König <christian.koenig@amd.com>
> Suggested-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 69 +++++++++++++++++++++++++
>  1 file changed, 69 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 58b6ab1be4c1..c76c41a312b0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1853,6 +1853,68 @@ static void amdgpu_ttm_pools_fini(struct amdgpu_device *adev)
>         adev->mman.ttm_pools = NULL;
>  }
>
> +/**
> + * amdgpu_ttm_mmio_remap_bo_init - allocate the singleton 4K MMIO_REMAP BO
> + * @adev: amdgpu device
> + *
> + * Allocates the kernel-owned one-page buffer in AMDGPU_GEM_DOMAIN_MMIO_REMAP
> + * when the hardware exposes a remap base (adev->rmmio_remap.base) and the host
> + * PAGE_SIZE is <= AMDGPU_GPU_PAGE_SIZE (4K). If either condition is not met, the
> + * function returns 0 and leaves adev->rmmio_remap.bo as NULL.
> + *
> + * If the BO is already allocated, the function does nothing and returns 0.
> + * Only errors during actual allocation (e.g., amdgpu_bo_create_kernel()) are
> + * propagated as negative returns.
> + *
> + * Return:
> + *  * 0 on success or intentional skip (feature not present/unsupported)
> + *  * negative errno on allocation failure
> + */
> +static int amdgpu_ttm_mmio_remap_bo_init(struct amdgpu_device *adev)
> +{
> +       int r;
> +
> +       if (!adev->rmmio_base)

Check for adev->rmmio_remap.bus_addr here.

> +               return 0;
> +
> +       /* Hardware remap page is fixed 4K; skip on larger PAGE_SIZE. */
> +       if (PAGE_SIZE > AMDGPU_GPU_PAGE_SIZE) {
> +               dev_warn(adev->dev, "MMIO_REMAP disabled: PAGE_SIZE=%lu > 4K\n", PAGE_SIZE);

No need to warn here.

> +               return 0;
> +       }
> +
> +       if (adev->rmmio_remap.bo)
> +               return 0;

Why is this here?

> +
> +       /* Create exactly ONE kernel-owned BO in the MMIO_REMAP domain */
> +       r = amdgpu_bo_create_kernel(adev,
> +                                   AMDGPU_GPU_PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE,
> +                                   AMDGPU_GEM_DOMAIN_MMIO_REMAP,
> +                                   &adev->rmmio_remap.bo,
> +                                   NULL, NULL);
> +       if (r) {
> +               dev_err(adev->dev, "MMIO_REMAP: BO create failed (%d)\n", r);
> +               return r;
> +       }
> +
> +       return 0;
> +}
> +
> +/**
> + * amdgpu_ttm_mmio_remap_bo_fini - free the singleton MMIO_REMAP BO
> + * @adev: amdgpu device
> + *
> + * Frees the kernel-owned MMIO_REMAP BO if it was allocated by
> + * amdgpu_ttm_mmio_remap_bo_init().
> + */
> +static void amdgpu_ttm_mmio_remap_bo_fini(struct amdgpu_device *adev)
> +{
> +       if (adev->rmmio_remap.bo) {
> +               amdgpu_bo_free_kernel(&adev->rmmio_remap.bo, NULL, NULL);
> +               adev->rmmio_remap.bo = NULL;
> +       }
> +}
> +
>  /*
>   * amdgpu_ttm_init - Init the memory management (ttm) as well as various
>   * gtt/vram related fields.
> @@ -2027,6 +2089,11 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
>                 return r;
>         }
>
> +       /* Allocate the singleton MMIO_REMAP BO (4K) if supported */
> +       r = amdgpu_ttm_mmio_remap_bo_init(adev);
> +       if (r)
> +               return r;
> +
>         /* Initialize preemptible memory pool */
>         r = amdgpu_preempt_mgr_init(adev);
>         if (r) {
> @@ -2090,6 +2157,8 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
>         amdgpu_bo_free_kernel(&adev->mman.sdma_access_bo, NULL,
>                                         &adev->mman.sdma_access_ptr);
>
> +       /* Drop the singleton MMIO_REMAP BO (if allocated) */
> +       amdgpu_ttm_mmio_remap_bo_fini(adev);
>         amdgpu_ttm_fw_reserve_vram_fini(adev);
>         amdgpu_ttm_drv_reserve_vram_fini(adev);
>
> --
> 2.34.1
>

Re: [RFC PATCH v2 8/8] drm/amdgpu/gem: Return Handle to MMIO_REMAP Singleton in GEM_CREATE

[Alex Deucher]

On Sat, Aug 23, 2025 at 5:48 AM Srinivasan Shanmugam
<srinivasan.shanmugam@amd.com> wrote:
>
> Enable userspace to obtain a handle to the kernel-owned MMIO_REMAP
> singleton when AMDGPU_GEM_DOMAIN_MMIO_REMAP is requested via
> amdgpu_gem_create_ioctl().
>
> Validate the fixed 4K constraint: if PAGE_SIZE > AMDGPU_GPU_PAGE_SIZE
> return -EINVAL; when provided, size and alignment must equal
> AMDGPU_GPU_PAGE_SIZE.
>
> If the singleton BO is not available, return -ENODEV.
>
> Cc: Christian König <christian.koenig@amd.com>
> Suggested-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 59 +++++++++++++++++++++++++
>  1 file changed, 59 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> index d8cffd26455b..655281f57a99 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> @@ -424,6 +424,38 @@ const struct drm_gem_object_funcs amdgpu_gem_object_funcs = {
>         .vm_ops = &amdgpu_gem_vm_ops,
>  };
>
> +/**
> + * amdgpu_gem_get_mmio_remap_handle - Create a GEM handle for the MMIO_REMAP BO
> + * @file_priv: DRM file corresponding to the calling process
> + * @adev: amdgpu device
> + * @handle: returned userspace GEM handle (out)
> + *
> + * Creates a GEM handle to the kernel-owned singleton MMIO_REMAP buffer object
> + * (adev->rmmio_remap.bo). The BO is expected to be allocated during TTM init
> + * when the hardware exposes a remap base and PAGE_SIZE <= 4K.
> + *
> + * drm_gem_handle_create() acquires the handle reference, which will be dropped
> + * by GEM_CLOSE in userspace.
> + *
> + * * Return:
> + * * 0 on success
> + * * -ENODEV if the MMIO_REMAP BO is not available
> + * * A negative errno from drm_gem_handle_create() on failure
> + *
> + */
> +static int amdgpu_gem_get_mmio_remap_handle(struct drm_file *file_priv,
> +                                           struct amdgpu_device *adev,
> +                                           u32 *handle)
> +{
> +       struct amdgpu_bo *bo = READ_ONCE(adev->rmmio_remap.bo);

Why are you using READ_ONCE here?

Alex

> +
> +       if (!bo)
> +               return -ENODEV;
> +
> +       /* drm_gem_handle_create() gets the ref; GEM_CLOSE drops it */
> +       return drm_gem_handle_create(file_priv, &bo->tbo.base, handle);
> +}
> +
>  /*
>   * GEM ioctls.
>   */
> @@ -468,6 +500,33 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
>         if (args->in.domains & AMDGPU_GEM_DOMAIN_MMIO_REMAP)
>                 return -EINVAL;
>
> +       /*
> +        * === MMIO remap (HDP flush) fast-path ===
> +        * If userspace asks for the MMIO_REMAP domain, don't allocate a new BO.
> +        * Return a handle to the singleton BO created at ttm init.
> +        */
> +       if (args->in.domains & AMDGPU_GEM_DOMAIN_MMIO_REMAP) {
> +               /*
> +                * The MMIO remap page is fixed 4K on the GPU side. Do not
> +                * allow use if the system PAGE_SIZE is larger than the GPU
> +                * page size.
> +                */
> +               if (PAGE_SIZE > AMDGPU_GPU_PAGE_SIZE)
> +                       return -EINVAL;
> +
> +               /* Enforce fixed size/alignment when provided by userspace. */
> +               if (size && size != AMDGPU_GPU_PAGE_SIZE)
> +                       return -EINVAL;
> +               if (args->in.alignment && args->in.alignment != AMDGPU_GPU_PAGE_SIZE)
> +                       return -EINVAL;
> +
> +               r = amdgpu_gem_get_mmio_remap_handle(filp, adev, &handle);
> +               if (r)
> +                       return r;
> +               args->out.handle = handle;
> +               return 0;
> +       }
> +
>         /* create a gem object to contain this object in */
>         if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |
>             AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
> --
> 2.34.1
>