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[2001:4c4e:24cb:f700:23e8:3719:bda9:8268]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b6d8541fb5bsm1382534366b.56.2025.10.29.03.48.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Oct 2025 03:48:41 -0700 (PDT) Message-ID: <2f0591f9dc2dadac72e8def5977afdc0a1e876b1.camel@gmail.com> Subject: Re: [PATCH 05/14] drm/amdgpu/vce: Clear VCPU BO before copying firmware to it From: Timur =?ISO-8859-1?Q?Krist=F3f?= To: Christian =?ISO-8859-1?Q?K=F6nig?= , amd-gfx@lists.freedesktop.org, Alex Deucher , Alexandre Demers , Rodrigo Siqueira Date: Wed, 29 Oct 2025 11:48:41 +0100 In-Reply-To: References: <20251028220628.8371-1-timur.kristof@gmail.com> <20251028220628.8371-6-timur.kristof@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2 (3.56.2-2.fc42) MIME-Version: 1.0 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On Wed, 2025-10-29 at 11:19 +0100, Christian K=C3=B6nig wrote: > On 10/28/25 23:06, Timur Krist=C3=B3f wrote: > > The VCPU BO doesn't only contain the VCE firmware but also other > > ranges that the VCE uses for its stack and data. Let's initialize > > this to zero to avoid having garbage in the VCPU BO. >=20 > Absolutely clear NAK. >=20 > This is intentionally not initialized on resume to avoid breaking > encode sessions which existed before suspend. How can there be encode sessions from before suspend? I think that there can't be. As far as I see, before suspend we wait for the VCE to go idle, meaning that we wait for all pending work to finish. amdgpu_vce_suspend has a comment which says: suspending running encoding sessions isn't supported > Why exactly is that an issue? We need to clear at least some of the BO for the VCE1 firmware validation mechanism. This is done in a memset in vce_v1_0_load_fw in the old radeon driver. Also I think it's a good idea to avoid having garbage in the VCPU BO. > The VCE FW BO should be cleared to zero after initial allocation? To clarify, are you suggesting that I move the memset to after the BO creation, and then never clear it again? Or are you saying that amdgpu_bo_create_reserved already clears the BO? >=20 > Regards, > Christian. >=20 > >=20 > > Fixes: d38ceaf99ed0 ("drm/amdgpu: add core driver (v4)") > > Signed-off-by: Timur Krist=C3=B3f > > --- > > =C2=A0drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 1 + > > =C2=A01 file changed, 1 insertion(+) > >=20 > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c > > index b9060bcd4806..eaa06dbef5c4 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c > > @@ -310,6 +310,7 @@ int amdgpu_vce_resume(struct amdgpu_device > > *adev) > > =C2=A0 offset =3D le32_to_cpu(hdr->ucode_array_offset_bytes); > > =C2=A0 > > =C2=A0 if (drm_dev_enter(adev_to_drm(adev), &idx)) { > > + memset32(cpu_addr, 0, amdgpu_bo_size(adev- > > >vce.vcpu_bo) / 4); > > =C2=A0 memcpy_toio(cpu_addr, adev->vce.fw->data + offset, > > =C2=A0 =C2=A0=C2=A0=C2=A0 adev->vce.fw->size - offset); > > =C2=A0 drm_dev_exit(idx);