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Tue, 5 Oct 2021 17:11:05 +0000 Message-ID: <33774abc-c31d-e3d6-43ec-b80bc7e946c5@amd.com> Date: Tue, 5 Oct 2021 13:10:59 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.1.1 Subject: Re: [PATCH v2 19/23] drm/amd/display: Add debug flags for USB4 DP link training Content-Language: en-US To: Wayne Lin , amd-gfx@lists.freedesktop.org Cc: alexander.deucher@amd.com, nicholas.kazlauskas@amd.com, Rodrigo.Siqueira@amd.com, stylon.wang@amd.com, jude.shih@amd.com, jimmy.kizito@amd.com, meenakshikumar.somasundaram@amd.com, Jun Lei References: <20211005075205.3467938-1-Wayne.Lin@amd.com> <20211005075205.3467938-20-Wayne.Lin@amd.com> From: Harry Wentland In-Reply-To: <20211005075205.3467938-20-Wayne.Lin@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-ClientProxiedBy: BN8PR16CA0023.namprd16.prod.outlook.com (2603:10b6:408:4c::36) To CO6PR12MB5427.namprd12.prod.outlook.com (2603:10b6:5:358::13) MIME-Version: 1.0 Received: from [10.254.46.98] (165.204.84.11) by BN8PR16CA0023.namprd16.prod.outlook.com (2603:10b6:408:4c::36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4566.19 via Frontend Transport; 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> } > +#if defined(CONFIG_DRM_AMD_DC_DCN) Why is this guarded with DC_DCN when all other DPIA code isn't? It looks like it might be unnecessary. > + /* Check DP tunnel LTTPR mode debug option. */ > + if (link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA && > + link->dc->debug.dpia_debug.bits.force_non_lttpr) > + link->lttpr_mode = LTTPR_MODE_NON_LTTPR; > +#endif > > if (link->lttpr_mode == LTTPR_MODE_NON_TRANSPARENT || link->lttpr_mode == LTTPR_MODE_TRANSPARENT) { > /* By reading LTTPR capability, RX assumes that we will enable > diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c > index 7407c755a73e..ce15a38c2aea 100644 > --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c > +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c > @@ -528,6 +528,12 @@ static uint32_t dpia_get_eq_aux_rd_interval(const struct dc_link *link, > dp_translate_training_aux_read_interval( > link->dpcd_caps.lttpr_caps.aux_rd_interval[hop - 1]); > > +#if defined(CONFIG_DRM_AMD_DC_DCN) Same here. Please drop this guard if we don't need it. Harry > + /* Check debug option for extending aux read interval. */ > + if (link->dc->debug.dpia_debug.bits.extend_aux_rd_interval) > + wait_time_microsec = DPIA_DEBUG_EXTENDED_AUX_RD_INTERVAL_US; > +#endif > + > return wait_time_microsec; > } > > diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h > index e3f884942e04..86fa94a2ef48 100644 > --- a/drivers/gpu/drm/amd/display/dc/dc.h > +++ b/drivers/gpu/drm/amd/display/dc/dc.h > @@ -499,7 +499,9 @@ union root_clock_optimization_options { > union dpia_debug_options { > struct { > uint32_t disable_dpia:1; > - uint32_t reserved:31; > + uint32_t force_non_lttpr:1; > + uint32_t extend_aux_rd_interval:1; > + uint32_t reserved:29; > } bits; > uint32_t raw; > }; > diff --git a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dpia.h b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dpia.h > index 790b904e37e1..e3dfe4c89ce0 100644 > --- a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dpia.h > +++ b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dpia.h > @@ -34,6 +34,9 @@ struct dc_link_settings; > /* The approximate time (us) it takes to transmit 9 USB4 DP clock sync packets. */ > #define DPIA_CLK_SYNC_DELAY 16000 > > +/* Extend interval between training status checks for manual testing. */ > +#define DPIA_DEBUG_EXTENDED_AUX_RD_INTERVAL_US 60000000 > + > /** @note Can remove once DP tunneling registers in upstream include/drm/drm_dp_helper.h */ > /* DPCD DP Tunneling over USB4 */ > #define DP_TUNNELING_CAPABILITIES_SUPPORT 0xe000d >