Re: [PATCH 1/2] drm/edid: Parse HDMI 2.2 FRL rates from the SCDS

[Jani Nikula <jani.nikula@linux.intel.com>]

On Wed, 28 Oct 2026, Fangzhi Zuo <jerry.zuo@amd.com> wrote:
> [Why]
> drm_get_max_frl_rate() only decodes Max_FRL_Rate values 1-6, so a sink
> advertising an HDMI 2.2 rate (7, 8 or 9) falls into the default case and
> is reported as having no FRL support at all.
>
> [How]
> Decode the HDMI 2.2 Max_FRL_Rate values 7, 8 and 9 as 16, 20 and 24 Gbps
> per lane over 4 lanes.
>
> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/drm_edid.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 42f4e41c459f..48d5c4bd4812 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -6193,6 +6193,18 @@ void drm_get_max_frl_rate(int max_frl_rate, u8 *max_lanes, u8 *max_rate_per_lane
>  		*max_lanes = 4;
>  		*max_rate_per_lane = 12;
>  		break;
> +	case 7:
> +		*max_lanes = 4;
> +		*max_rate_per_lane = 16;
> +		break;
> +	case 8:
> +		*max_lanes = 4;
> +		*max_rate_per_lane = 20;
> +		break;
> +	case 9:
> +		*max_lanes = 4;
> +		*max_rate_per_lane = 24;
> +		break;
>  	case 0:
>  	default:
>  		*max_lanes = 0;

-- 
Jani Nikula, Intel