Re: [PATCH] drm/amdgpu: Disable PCIe dynamic speed switching on Ryzen Pinnacle Ridge

["Lazar, Lijo" <lijo.lazar@amd.com>]

On 09-Jul-26 8:45 AM, Mario Limonciello wrote:
> AMD Ryzen Pinnacle Ridge (Zen+, family 0x17 model 0x08) CPUs have
> PCI controllers that don't support PCIe dynamic speed switching,
> causing system freezes during GPU initialization when enabled.
> 
> Disable dynamic speed switching when this CPU is detected.
> 
> Assisted-by: Claude:sonnet
> Fixes: 466a7d115326e ("drm/amd: Use the first non-dGPU PCI device for BW limits")
> Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/5436
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 +++++++++
>   1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 27f7a841cd623..f8324712b712c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1289,6 +1289,15 @@ static bool amdgpu_device_pcie_dynamic_switching_supported(struct amdgpu_device
>   
>   	if (c->x86_vendor == X86_VENDOR_INTEL)
>   		return false;
> +
> +	/*
> +	 * AMD Ryzen Pinnacle Ridge (Zen+, family 0x17 model 0x08) CPUs don't
> +	 * support PCIe dynamic speed switching.
> +	 * https://gitlab.freedesktop.org/drm/amd/-/work_items/5436
> +	 */

Assited-by effect is visibly seen :)

As per rev guide, Gen3 switch hang is common in 0x17/00-0F.

Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>

Thanks,
Lijo

> +	if (c->x86_vendor == X86_VENDOR_AMD && c->x86 == 0x17 &&
> +	    c->x86_model == 0x08)
> +		return false;
>   #endif
>   	return true;
>   }