From: "Khatri, Sunil" <sukhatri@amd.com>
To: "Christian König" <ckoenig.leichtzumerken@gmail.com>,
alexander.deucher@amd.com, Prike.Liang@amd.com,
amd-gfx@lists.freedesktop.org
Cc: christian.koenig@amd.com
Subject: Re: [PATCH 05/11] drm/amdgpu: rework userq fence signal processing
Date: Wed, 22 Apr 2026 15:46:09 +0530 [thread overview]
Message-ID: <3e600910-dac6-4b01-a190-d2fc9a6637f0@amd.com> (raw)
In-Reply-To: <20260421125513.4545-5-christian.koenig@amd.com>
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
On 21-04-2026 06:25 pm, Christian König wrote:
> Move more code into a common userq function.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c | 13 +++++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h | 1 +
> drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 10 +---------
> drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 10 +---------
> drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c | 11 +----------
> drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 11 +----------
> drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 11 +----------
> 7 files changed, 19 insertions(+), 48 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
> index 174190a77005..8ce001481d42 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c
> @@ -205,6 +205,19 @@ void amdgpu_userq_start_hang_detect_work(struct amdgpu_usermode_queue *queue)
> msecs_to_jiffies(timeout_ms));
> }
>
> +void amdgpu_userq_process_fence_irq(struct amdgpu_device *adev, u32 doorbell)
> +{
> + struct xarray *xa = &adev->userq_doorbell_xa;
> + struct amdgpu_usermode_queue *queue;
> + unsigned long flags;
> +
> + xa_lock_irqsave(xa, flags);
> + queue = xa_load(xa, doorbell);
> + if (queue)
> + amdgpu_userq_fence_driver_process(queue->fence_drv);
> + xa_unlock_irqrestore(xa, flags);
> +}
> +
> static void amdgpu_userq_init_hang_detect_work(struct amdgpu_usermode_queue *queue)
> {
> INIT_DELAYED_WORK(&queue->hang_detect_work, amdgpu_userq_hang_detect_work);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h
> index cb92789c1ed1..843ea8ecc5d7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h
> @@ -168,6 +168,7 @@ void amdgpu_userq_reset_work(struct work_struct *work);
> void amdgpu_userq_pre_reset(struct amdgpu_device *adev);
> int amdgpu_userq_post_reset(struct amdgpu_device *adev, bool vram_lost);
> void amdgpu_userq_start_hang_detect_work(struct amdgpu_usermode_queue *queue);
> +void amdgpu_userq_process_fence_irq(struct amdgpu_device *adev, u32 doorbell);
>
> int amdgpu_userq_input_va_validate(struct amdgpu_device *adev,
> struct amdgpu_usermode_queue *queue,
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> index 837d98947958..1ffbb5450f3a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> @@ -6528,15 +6528,7 @@ static int gfx_v11_0_eop_irq(struct amdgpu_device *adev,
> DRM_DEBUG("IH: CP EOP\n");
>
> if (adev->enable_mes && doorbell_offset) {
> - struct amdgpu_usermode_queue *queue;
> - struct xarray *xa = &adev->userq_doorbell_xa;
> - unsigned long flags;
> -
> - xa_lock_irqsave(xa, flags);
> - queue = xa_load(xa, doorbell_offset);
> - if (queue)
> - amdgpu_userq_fence_driver_process(queue->fence_drv);
> - xa_unlock_irqrestore(xa, flags);
> + amdgpu_userq_process_fence_irq(adev, doorbell_offset);
> } else {
> me_id = (entry->ring_id & 0x0c) >> 2;
> pipe_id = (entry->ring_id & 0x03) >> 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> index 60f0c7d6a7a3..6baac533a2e6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> @@ -4859,15 +4859,7 @@ static int gfx_v12_0_eop_irq(struct amdgpu_device *adev,
> DRM_DEBUG("IH: CP EOP\n");
>
> if (adev->enable_mes && doorbell_offset) {
> - struct xarray *xa = &adev->userq_doorbell_xa;
> - struct amdgpu_usermode_queue *queue;
> - unsigned long flags;
> -
> - xa_lock_irqsave(xa, flags);
> - queue = xa_load(xa, doorbell_offset);
> - if (queue)
> - amdgpu_userq_fence_driver_process(queue->fence_drv);
> - xa_unlock_irqrestore(xa, flags);
> + amdgpu_userq_process_fence_irq(adev, doorbell_offset);
> } else {
> me_id = (entry->ring_id & 0x0c) >> 2;
> pipe_id = (entry->ring_id & 0x03) >> 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
> index 948758b51b5c..ae65412109c2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
> @@ -3654,16 +3654,7 @@ static int gfx_v12_1_eop_irq(struct amdgpu_device *adev,
> DRM_DEBUG("IH: CP EOP\n");
>
> if (adev->enable_mes && doorbell_offset) {
> - struct xarray *xa = &adev->userq_doorbell_xa;
> - struct amdgpu_usermode_queue *queue;
> - unsigned long flags;
> -
> - xa_lock_irqsave(xa, flags);
> - queue = xa_load(xa, doorbell_offset);
> - if (queue)
> - amdgpu_userq_fence_driver_process(queue->fence_drv);
> -
> - xa_unlock_irqrestore(xa, flags);
> + amdgpu_userq_process_fence_irq(adev, doorbell_offset);
> } else {
> me_id = (entry->ring_id & 0x0c) >> 2;
> pipe_id = (entry->ring_id & 0x03) >> 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> index de329b76a00c..bf09ac841a68 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> @@ -1662,17 +1662,8 @@ static int sdma_v6_0_process_fence_irq(struct amdgpu_device *adev,
> u32 doorbell_offset = entry->src_data[0];
>
> if (adev->enable_mes && doorbell_offset) {
> - struct amdgpu_usermode_queue *queue;
> - struct xarray *xa = &adev->userq_doorbell_xa;
> - unsigned long flags;
> -
> doorbell_offset >>= SDMA0_QUEUE0_DOORBELL_OFFSET__OFFSET__SHIFT;
> -
> - xa_lock_irqsave(xa, flags);
> - queue = xa_load(xa, doorbell_offset);
> - if (queue)
> - amdgpu_userq_fence_driver_process(queue->fence_drv);
> - xa_unlock_irqrestore(xa, flags);
> + amdgpu_userq_process_fence_irq(adev, doorbell_offset);
> }
>
> return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
> index 85d98a0e1bff..f154b68dda70 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
> @@ -1594,17 +1594,8 @@ static int sdma_v7_0_process_fence_irq(struct amdgpu_device *adev,
> u32 doorbell_offset = entry->src_data[0];
>
> if (adev->enable_mes && doorbell_offset) {
> - struct xarray *xa = &adev->userq_doorbell_xa;
> - struct amdgpu_usermode_queue *queue;
> - unsigned long flags;
> -
> doorbell_offset >>= SDMA0_QUEUE0_DOORBELL_OFFSET__OFFSET__SHIFT;
> -
> - xa_lock_irqsave(xa, flags);
> - queue = xa_load(xa, doorbell_offset);
> - if (queue)
> - amdgpu_userq_fence_driver_process(queue->fence_drv);
> - xa_unlock_irqrestore(xa, flags);
> + amdgpu_userq_process_fence_irq(adev, doorbell_offset);
> }
>
> return 0;
next prev parent reply other threads:[~2026-04-22 10:16 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-21 12:55 [PATCH 01/11] drm/amdgpu: fix AMDGPU_INFO_READ_MMR_REG Christian König
2026-04-21 12:55 ` [PATCH 02/11] drm/amdgpu: remove deadlocks from amdgpu_userq_pre_reset Christian König
2026-04-22 4:53 ` Khatri, Sunil
2026-04-22 7:13 ` Christian König
2026-04-22 7:19 ` Khatri, Sunil
2026-04-22 7:24 ` Christian König
2026-04-22 7:29 ` Khatri, Sunil
2026-04-27 8:45 ` Liang, Prike
2026-04-21 12:55 ` [PATCH 03/11] drm/amdgpu: nuke amdgpu_userq_fence_free Christian König
2026-04-22 8:29 ` Khatri, Sunil
2026-04-22 9:26 ` Christian König
2026-04-22 9:40 ` Khatri, Sunil
2026-04-22 10:12 ` Christian König
2026-04-22 14:32 ` Khatri, Sunil
2026-04-27 6:21 ` Liang, Prike
2026-04-21 12:55 ` [PATCH 04/11] drm/amdgpu: rework amdgpu_userq_signal_ioctl Christian König
2026-04-22 10:08 ` Khatri, Sunil
2026-04-22 10:14 ` Christian König
2026-04-22 15:14 ` Khatri, Sunil
2026-04-23 9:58 ` Liang, Prike
2026-04-23 10:47 ` Christian König
2026-04-23 10:54 ` Khatri, Sunil
2026-04-24 8:01 ` Liang, Prike
2026-04-24 13:02 ` Christian König
2026-04-21 12:55 ` [PATCH 05/11] drm/amdgpu: rework userq fence signal processing Christian König
2026-04-22 10:16 ` Khatri, Sunil [this message]
2026-04-21 12:55 ` [PATCH 06/11] drm/amdgpu: remove almost all calls to amdgpu_userq_detect_and_reset_queues Christian König
2026-04-22 10:20 ` Khatri, Sunil
2026-04-21 12:55 ` [PATCH 07/11] drm/amdgpu: fix userq hang detection and reset Christian König
2026-04-22 10:35 ` Khatri, Sunil
2026-04-21 12:55 ` [PATCH 08/11] drm/amdgpu: rework userq reset work handling Christian König
2026-04-23 10:43 ` Khatri, Sunil
2026-04-21 12:55 ` [PATCH 09/11] drm/amdgpu: revert to old status lock handling v4 Christian König
2026-04-23 10:45 ` Khatri, Sunil
2026-04-21 12:55 ` [PATCH 10/11] drm/amdgpu: restructure VM state machine v2 Christian König
2026-04-23 10:46 ` Khatri, Sunil
2026-04-21 12:55 ` [PATCH 11/11] drm/amdgpu: WIP sync amdgpu_ttm_fill_mem only to kernel fences Christian König
2026-04-23 10:47 ` Khatri, Sunil
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