From: "Christian König" <ckoenig.leichtzumerken@gmail.com>
To: Oak Zeng <Oak.Zeng@amd.com>, amd-gfx@lists.freedesktop.org
Cc: Felix.Kuehling@amd.com, James.Zhu@amd.com, christian.koenig@amd.com
Subject: Re: [PATCH] drm/amdgpu: Set ttm caching flags during bo allocation
Date: Tue, 29 Jun 2021 12:53:06 +0200 [thread overview]
Message-ID: <4389dc51-cca9-ab84-51ca-801aed5f5de0@gmail.com> (raw)
In-Reply-To: <1624922136-15220-1-git-send-email-Oak.Zeng@amd.com>
Am 29.06.21 um 01:15 schrieb Oak Zeng:
> The ttm caching flags (ttm_cached, ttm_write_combined etc) are
> used to determine a buffer object's mapping attributes in both
> CPU page table and GPU page table (when that buffer is also
> accessed by GPU). Currently the ttm caching flags are set in
> function amdgpu_ttm_io_mem_reserve which is called during
> DRM_AMDGPU_GEM_MMAP ioctl. This has a problem since the GPU
> mapping of the buffer object (ioctl DRM_AMDGPU_GEM_VA) can
> happen earlier than the mmap time, thus the GPU page table
> update code can't pick up the right ttm caching flags to
> decide the right GPU page table attributes.
>
> This patch moves the ttm caching flags setting to function
> amdgpu_vram_mgr_new - this function is called during the
> first step of a buffer object create (eg, DRM_AMDGPU_GEM_CREATE)
> so the later both CPU and GPU mapping function calls will
> pick up this flag for CPU/GPU page table set up.
>
> Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
> Suggested-by: Christian Koenig <Christian.Koenig@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ----
> drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 5 +++++
> 2 files changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 6297363..93acf6f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -607,10 +607,6 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
>
> mem->bus.offset += adev->gmc.aper_base;
> mem->bus.is_iomem = true;
> - if (adev->gmc.xgmi.connected_to_cpu)
> - mem->bus.caching = ttm_cached;
> - else
> - mem->bus.caching = ttm_write_combined;
> break;
> default:
> return -EINVAL;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
> index a52e17e..6cb66eb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
> @@ -454,6 +454,11 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
> if (i == 1)
> mem->placement |= TTM_PL_FLAG_CONTIGUOUS;
>
> + if (adev->gmc.xgmi.connected_to_cpu)
> + mem->bus.caching = ttm_cached;
> + else
> + mem->bus.caching = ttm_write_combined;
> +
> atomic64_add(vis_usage, &mgr->vis_usage);
> mem->mm_node = nodes;
> return 0;
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next prev parent reply other threads:[~2021-06-29 10:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-28 23:15 [PATCH] drm/amdgpu: Set ttm caching flags during bo allocation Oak Zeng
2021-06-29 9:26 ` Xu, Feifei
2021-06-29 10:53 ` Christian König [this message]
2021-06-29 11:25 ` Das, Nirmoy
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