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From: "Lazar, Lijo" <lijo.lazar@amd.com>
To: Samuel Zhang <guoqing.zhang@amd.com>, amd-gfx@lists.freedesktop.org
Cc: victor.zhao@amd.com, haijun.chang@amd.com,
	Christian.Koenig@amd.com, Alexander.Deucher@amd.com,
	Owen.Zhang2@amd.com, Qing.Ma@amd.com, Emily.Deng@amd.com
Subject: Re: [PATCH v9 4/4] drm/amdgpu: fix fence fallback timer expired error
Date: Fri, 30 May 2025 12:18:41 +0530	[thread overview]
Message-ID: <4b72c728-b028-4cab-8a3e-d6de8041feb9@amd.com> (raw)
In-Reply-To: <20250529100256.754769-5-guoqing.zhang@amd.com>



On 5/29/2025 3:32 PM, Samuel Zhang wrote:
> IH is not working after switching a new gpu index for the first time.
> 
> During VM resume, QEMU programming of VF MSIX table (register GFXMSIX_VECT0_ADDR_LO)
> may not work.The access could be blocked by nBIF protection as VF isn't in
> exclusive access mode. Exclusive access is enabled now, disable/enable MSIX
> so that QEMU reprograms MSIX table.
> 
> call amdgpu_restore_msix on resume to restore msix table.
> 
> Signed-off-by: Samuel Zhang <guoqing.zhang@amd.com>

Acked-by: Lijo Lazar <lijo.lazar@amd.com>

Thanks,
Lijo

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 +++++++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c    | 2 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h    | 1 +
>  3 files changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 0246a33b90af..f67bc9a52d53 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -5051,6 +5051,13 @@ static inline int amdgpu_virt_resume(struct amdgpu_device *adev)
>  	int r;
>  	unsigned int prev_physical_node_id = adev->gmc.xgmi.physical_node_id;
>  
> +	/* During VM resume, QEMU programming of VF MSIX table (register GFXMSIX_VECT0_ADDR_LO)
> +	 * may not work. The access could be blocked by nBIF protection as VF isn't in
> +	 * exclusive access mode. Exclusive access is enabled now, disable/enable MSIX
> +	 * so that QEMU reprograms MSIX table.
> +	 */
> +	amdgpu_restore_msix(adev);
> +
>  	r = adev->gfxhub.funcs->get_xgmi_info(adev);
>  	if (r)
>  		return r;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> index 0e890f2785b1..f080354efec8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> @@ -245,7 +245,7 @@ static bool amdgpu_msi_ok(struct amdgpu_device *adev)
>  	return true;
>  }
>  
> -static void amdgpu_restore_msix(struct amdgpu_device *adev)
> +void amdgpu_restore_msix(struct amdgpu_device *adev)
>  {
>  	u16 ctrl;
>  
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
> index aef5c216b191..f52bd7e6d988 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
> @@ -149,5 +149,6 @@ void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev);
>  int amdgpu_irq_add_domain(struct amdgpu_device *adev);
>  void amdgpu_irq_remove_domain(struct amdgpu_device *adev);
>  unsigned amdgpu_irq_create_mapping(struct amdgpu_device *adev, unsigned src_id);
> +void amdgpu_restore_msix(struct amdgpu_device *adev);
>  
>  #endif


      reply	other threads:[~2025-05-30  6:48 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-29 10:02 [PATCH v9 0/4] enable xgmi node migration support for hibernate on SRIOV Samuel Zhang
2025-05-29 10:02 ` [PATCH v9 1/4] drm/amdgpu: update xgmi info and vram_base_offset on resume Samuel Zhang
2025-05-29 10:02 ` [PATCH v9 2/4] drm/amdgpu: update GPU addresses for SMU and PSP Samuel Zhang
2025-05-29 10:02 ` [PATCH v9 3/4] drm/amdgpu: enable pdb0 for hibernation on SRIOV Samuel Zhang
2025-06-02 12:27   ` Christian König
2025-05-29 10:02 ` [PATCH v9 4/4] drm/amdgpu: fix fence fallback timer expired error Samuel Zhang
2025-05-30  6:48   ` Lazar, Lijo [this message]

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