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From: "Liu, Leo" <Leo.Liu-5C7GfCeVMHo@public.gmane.org>
To: Alex Deucher <alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: "amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
	<amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
Subject: Re: [PATCH 6/6] drm/amdgpu: remove MM engine related WARN_ON for user fence
Date: Wed, 8 May 2019 19:02:15 +0000	[thread overview]
Message-ID: <4c83931c-4752-be8b-cca7-9b0cc12cc9dc@amd.com> (raw)
In-Reply-To: <CADnq5_P7Aa=YhxLNi4Wt8y_cTJmiW8OhPgcpDn5hzyiY4e4WYg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>


On 5/8/19 1:45 PM, Alex Deucher wrote:
> [CAUTION: External Email]
>
> On Wed, May 8, 2019 at 11:51 AM Liu, Leo <Leo.Liu@amd.com> wrote:
>> Since the check aleady done with command submission check
> Missing signed-off-by.
>
> patches 1-5 are:
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>
> As for this patch, I don't think these are directly related to user
> fences and we may want to keep them.

Okay. I will drop this patch.

Thanks for the reviews.

Leo



>
> Alex
>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 2 --
>>   drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c   | 2 --
>>   drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c   | 2 --
>>   drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c   | 4 ----
>>   drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c   | 5 -----
>>   drivers/gpu/drm/amd/amdgpu/vce_v4_0.c   | 2 --
>>   drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c   | 6 ------
>>   7 files changed, 23 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
>> index c021b114c8a4..967a5f080863 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
>> @@ -1053,8 +1053,6 @@ void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring,
>>   void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
>>                                  unsigned flags)
>>   {
>> -       WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>>          amdgpu_ring_write(ring, VCE_CMD_FENCE);
>>          amdgpu_ring_write(ring, addr);
>>          amdgpu_ring_write(ring, upper_32_bits(addr));
>> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
>> index bf3385280d3f..dc60c8753752 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
>> @@ -446,8 +446,6 @@ static void uvd_v4_2_stop(struct amdgpu_device *adev)
>>   static void uvd_v4_2_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
>>                                       unsigned flags)
>>   {
>> -       WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>>          amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
>>          amdgpu_ring_write(ring, seq);
>>          amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
>> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
>> index 3210a7bd9a6d..86234178d440 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
>> @@ -462,8 +462,6 @@ static void uvd_v5_0_stop(struct amdgpu_device *adev)
>>   static void uvd_v5_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
>>                                       unsigned flags)
>>   {
>> -       WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>>          amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
>>          amdgpu_ring_write(ring, seq);
>>          amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
>> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
>> index c61a314c56cc..486fa743c594 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
>> @@ -882,8 +882,6 @@ static void uvd_v6_0_stop(struct amdgpu_device *adev)
>>   static void uvd_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
>>                                       unsigned flags)
>>   {
>> -       WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>>          amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));
>>          amdgpu_ring_write(ring, seq);
>>          amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));
>> @@ -912,8 +910,6 @@ static void uvd_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
>>   static void uvd_v6_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
>>                          u64 seq, unsigned flags)
>>   {
>> -       WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>>          amdgpu_ring_write(ring, HEVC_ENC_CMD_FENCE);
>>          amdgpu_ring_write(ring, addr);
>>          amdgpu_ring_write(ring, upper_32_bits(addr));
>> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>> index cdb96d4cb424..18bec3605a80 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
>> @@ -1143,8 +1143,6 @@ static void uvd_v7_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
>>   {
>>          struct amdgpu_device *adev = ring->adev;
>>
>> -       WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>>          amdgpu_ring_write(ring,
>>                  PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_CONTEXT_ID), 0));
>>          amdgpu_ring_write(ring, seq);
>> @@ -1180,9 +1178,6 @@ static void uvd_v7_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
>>   static void uvd_v7_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
>>                          u64 seq, unsigned flags)
>>   {
>> -
>> -       WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>>          amdgpu_ring_write(ring, HEVC_ENC_CMD_FENCE);
>>          amdgpu_ring_write(ring, addr);
>>          amdgpu_ring_write(ring, upper_32_bits(addr));
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
>> index e267b073f525..06544f728085 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
>> @@ -963,8 +963,6 @@ static void vce_v4_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *j
>>   static void vce_v4_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
>>                          u64 seq, unsigned flags)
>>   {
>> -       WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>>          amdgpu_ring_write(ring, VCE_CMD_FENCE);
>>          amdgpu_ring_write(ring, addr);
>>          amdgpu_ring_write(ring, upper_32_bits(addr));
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
>> index ac2e5a1eb576..b00bd45bc258 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
>> @@ -1334,8 +1334,6 @@ static void vcn_v1_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64
>>   {
>>          struct amdgpu_device *adev = ring->adev;
>>
>> -       WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>>          amdgpu_ring_write(ring,
>>                  PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0));
>>          amdgpu_ring_write(ring, seq);
>> @@ -1506,8 +1504,6 @@ static void vcn_v1_0_enc_ring_set_wptr(struct amdgpu_ring *ring)
>>   static void vcn_v1_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
>>                          u64 seq, unsigned flags)
>>   {
>> -       WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>>          amdgpu_ring_write(ring, VCN_ENC_CMD_FENCE);
>>          amdgpu_ring_write(ring, addr);
>>          amdgpu_ring_write(ring, upper_32_bits(addr));
>> @@ -1666,8 +1662,6 @@ static void vcn_v1_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u6
>>   {
>>          struct amdgpu_device *adev = ring->adev;
>>
>> -       WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
>> -
>>          amdgpu_ring_write(ring,
>>                  PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_JPEG_GPCOM_DATA0), 0, 0, PACKETJ_TYPE0));
>>          amdgpu_ring_write(ring, seq);
>> --
>> 2.17.1
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
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  parent reply	other threads:[~2019-05-08 19:02 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-08 15:51 [PATCH 1/6] drm/amdgpu: add no_user_fence flag to ring funcs Liu, Leo
     [not found] ` <20190508155100.7810-1-leo.liu-5C7GfCeVMHo@public.gmane.org>
2019-05-08 15:51   ` [PATCH 2/6] drm/amdgpu/UVD: set no_user_fence flag to true Liu, Leo
2019-05-08 15:51   ` [PATCH 3/6] drm/amdgpu/VCE: " Liu, Leo
2019-05-08 15:51   ` [PATCH 4/6] drm/amdgpu/VCN: " Liu, Leo
2019-05-08 15:51   ` [PATCH 5/6] drm/amdgpu: check no_user_fence flag for engines Liu, Leo
2019-05-08 15:51   ` [PATCH 6/6] drm/amdgpu: remove MM engine related WARN_ON for user fence Liu, Leo
     [not found]     ` <20190508155100.7810-6-leo.liu-5C7GfCeVMHo@public.gmane.org>
2019-05-08 17:45       ` Alex Deucher
     [not found]         ` <CADnq5_P7Aa=YhxLNi4Wt8y_cTJmiW8OhPgcpDn5hzyiY4e4WYg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2019-05-08 19:02           ` Liu, Leo [this message]
     [not found]             ` <4c83931c-4752-be8b-cca7-9b0cc12cc9dc-5C7GfCeVMHo@public.gmane.org>
2019-05-09  7:13               ` Christian König

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