From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Huang Subject: Re: [PATCH] drm/amd/pp: Clean register first to avoid read original value Date: Fri, 30 Mar 2018 21:45:41 -0400 Message-ID: <55b19db8-1396-fd5a-e5b2-ea28672920fc@amd.com> References: <1522395206-5860-1-git-send-email-Rex.Zhu@amd.com> <9bac98b9-4add-6214-f461-bfd91d5636ad@amd.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1183110531==" Return-path: In-Reply-To: Content-Language: en-US List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: "Zhu, Rex" , "amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org" This is a multi-part message in MIME format. --===============1183110531== Content-Type: multipart/alternative; boundary="------------3428B6C548F02779EA4B594A" Content-Language: en-US This is a multi-part message in MIME format. --------------3428B6C548F02779EA4B594A Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Please confirm this with SMU team about your assumption. Regards, Eric On 03/30/2018 08:28 PM, Zhu, Rex wrote: > > when PPSMC_MSG_PmStatusLogSample sent, firmware will clean the temp > sampling date, and add the sample task to dpm loop. > > but firmware not  clean the registers.  if firmware not update the > registers, we will read out the original value. > > > Best Regards > > Rex > > > > > ------------------------------------------------------------------------ > *From:* amd-gfx on behalf of > Eric Huang > *Sent:* Friday, March 30, 2018 11:22 PM > *To:* amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org > *Subject:* Re: [PATCH] drm/amd/pp: Clean register first to avoid read > original value > > On 03/30/2018 10:36 AM, Eric Huang wrote: > > It is not necessary to do that. The register will reset to 0 after > > reading. > The register is not reset after reading. Actually after > PPSMC_MSG_PmStatusLogSample sent, the register will be updated. So it is > still not necessary to do that. > > Eric > > > > Eric > > > > > > On 03/30/2018 03:33 AM, Rex Zhu wrote: > >> Signed-off-by: Rex Zhu > >> --- > >> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 13 +++++++++++++ > >>   1 file changed, 13 insertions(+) > >> > >> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > >> b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > >> index aaa9f5b..38cf3a1 100644 > >> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > >> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > >> @@ -3368,6 +3368,19 @@ static int smu7_get_gpu_power(struct pp_hwmgr > >> *hwmgr, > >>               "Failed to start pm status log!", > >>               return -1); > >>   + cgs_write_ind_register(hwmgr->device, > >> +            CGS_IND_REG__SMC, > >> +            ixSMU_PM_STATUS_40, 0); > >> +    cgs_write_ind_register(hwmgr->device, > >> +            CGS_IND_REG__SMC, > >> +            ixSMU_PM_STATUS_49, 0); > >> +    cgs_write_ind_register(hwmgr->device, > >> +            CGS_IND_REG__SMC, > >> +            ixSMU_PM_STATUS_94, 0); > >> +    cgs_write_ind_register(hwmgr->device, > >> +            CGS_IND_REG__SMC, > >> +            ixSMU_PM_STATUS_95, 0); > >> + > >>       /* Sampling period from 50ms to 4sec */ > >>       msleep_interruptible(200); > > > > _______________________________________________ > amd-gfx mailing list > amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx > amd-gfx Info Page - freedesktop.org > > lists.freedesktop.org > Subscribing to amd-gfx: Subscribe to amd-gfx by filling out the > following form. Use of all freedesktop.org lists is subject to our > Code of Conduct. > > > --------------3428B6C548F02779EA4B594A Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: 8bit

Please confirm this with SMU team about your assumption.


Regards,

Eric


On 03/30/2018 08:28 PM, Zhu, Rex wrote:

when PPSMC_MSG_PmStatusLogSample sent, firmware will clean the temp sampling date, and add the sample task to dpm loop.

but firmware not  clean the registers.  if firmware not update the registers, we will read out the original value.


Best Regards

Rex




From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Eric Huang <jinhuieric.huang-5C7GfCeVMHo@public.gmane.org>
Sent: Friday, March 30, 2018 11:22 PM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: Re: [PATCH] drm/amd/pp: Clean register first to avoid read original value
 

On 03/30/2018 10:36 AM, Eric Huang wrote:
> It is not necessary to do that. The register will reset to 0 after
> reading.
The register is not reset after reading. Actually after
PPSMC_MSG_PmStatusLogSample sent, the register will be updated. So it is
still not necessary to do that.

Eric
>
> Eric
>
>
> On 03/30/2018 03:33 AM, Rex Zhu wrote:
>> Signed-off-by: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
>> ---
>>   drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 13 +++++++++++++
>>   1 file changed, 13 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
>> b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
>> index aaa9f5b..38cf3a1 100644
>> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
>> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
>> @@ -3368,6 +3368,19 @@ static int smu7_get_gpu_power(struct pp_hwmgr
>> *hwmgr,
>>               "Failed to start pm status log!",
>>               return -1);
>>   +    cgs_write_ind_register(hwmgr->device,
>> +            CGS_IND_REG__SMC,
>> +            ixSMU_PM_STATUS_40, 0);
>> +    cgs_write_ind_register(hwmgr->device,
>> +            CGS_IND_REG__SMC,
>> +            ixSMU_PM_STATUS_49, 0);
>> +    cgs_write_ind_register(hwmgr->device,
>> +            CGS_IND_REG__SMC,
>> +            ixSMU_PM_STATUS_94, 0);
>> +    cgs_write_ind_register(hwmgr->device,
>> +            CGS_IND_REG__SMC,
>> +            ixSMU_PM_STATUS_95, 0);
>> +
>>       /* Sampling period from 50ms to 4sec */
>>       msleep_interruptible(200);
>

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