Re: [PATCH 1/8] drm/amdgpu: fix VMHUB order to match the hardware

From: "Zhang, Jerry (Junwei)" <Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>
To: "Alex Deucher"
	<alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"Christian König"
	<deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
Cc: amd-gfx list <amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
Subject: Re: [PATCH 1/8] drm/amdgpu: fix VMHUB order to match the hardware
Date: Wed, 5 Apr 2017 10:37:39 +0800	[thread overview]
Message-ID: <58E45873.3030309@amd.com> (raw)
In-Reply-To: <CADnq5_NHtW=w2YfZw4=3G-rsYRyxyGJ0NPRormJtB6p+BqUjfg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

On 04/04/2017 03:23 AM, Alex Deucher wrote:
> On Mon, Apr 3, 2017 at 8:39 AM, Christian König <deathsimple@vodafone.de> wrote:
>> From: Christian König <christian.koenig@amd.com>
>>
>> Match our defines with what the hw uses.
>>
>> Signed-off-by: Christian König <christian.koenig@amd.com>
>
> Patches 1-4, 6-7:
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

With the Alex's comments.
Patches 1~7:
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>

(Although it looks they were already landed)

Jerry

>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  4 ++--
>>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 12 +++---------
>>   2 files changed, 5 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> index 86fba1a..c156534 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> @@ -126,8 +126,8 @@ extern int amdgpu_param_buf_per_se;
>>
>>   /* max number of VMHUB */
>>   #define AMDGPU_MAX_VMHUBS                      2
>> -#define AMDGPU_MMHUB                           0
>> -#define AMDGPU_GFXHUB                          1
>> +#define AMDGPU_GFXHUB                          0
>> +#define AMDGPU_MMHUB                           1
>>
>>   /* hardcode that limit for now */
>>   #define AMDGPU_VA_RESERVED_SIZE                        (8 << 20)
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> index df69aae..8dd99b2 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> @@ -129,8 +129,7 @@ static int gmc_v9_0_process_interrupt(struct amdgpu_device *adev,
>>                                  struct amdgpu_irq_src *source,
>>                                  struct amdgpu_iv_entry *entry)
>>   {
>> -       struct amdgpu_vmhub *gfxhub = &adev->vmhub[AMDGPU_GFXHUB];
>> -       struct amdgpu_vmhub *mmhub = &adev->vmhub[AMDGPU_MMHUB];
>> +       struct amdgpu_vmhub *hub = &adev->vmhub[entry->vm_id_src];
>>          uint32_t status = 0;
>>          u64 addr;
>>
>> @@ -138,13 +137,8 @@ static int gmc_v9_0_process_interrupt(struct amdgpu_device *adev,
>>          addr |= ((u64)entry->src_data[1] & 0xf) << 44;
>>
>>          if (!amdgpu_sriov_vf(adev)) {
>> -               if (entry->vm_id_src) {
>> -                       status = RREG32(mmhub->vm_l2_pro_fault_status);
>> -                       WREG32_P(mmhub->vm_l2_pro_fault_cntl, 1, ~1);
>> -               } else {
>> -                       status = RREG32(gfxhub->vm_l2_pro_fault_status);
>> -                       WREG32_P(gfxhub->vm_l2_pro_fault_cntl, 1, ~1);
>> -               }
>> +               status = RREG32(hub->vm_l2_pro_fault_status);
>> +               WREG32_P(hub->vm_l2_pro_fault_cntl, 1, ~1);
>>          }
>>
>>          if (printk_ratelimit()) {
>> --
>> 2.5.0
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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