From: "Lazar, Lijo" <lijo.lazar@amd.com>
To: Victor Zhao <Victor.Zhao@amd.com>, amd-gfx@lists.freedesktop.org
Cc: Andrey.Grodzovsky@amd.com
Subject: Re: [PATCH 1/3] Revert "drm/amdgpu: add debugfs amdgpu_reset_level"
Date: Thu, 13 Oct 2022 15:57:15 +0530 [thread overview]
Message-ID: <59b89250-4352-a1cc-6d7b-67c0d782838b@amd.com> (raw)
In-Reply-To: <20221013082745.46143-1-Victor.Zhao@amd.com>
On 10/13/2022 1:57 PM, Victor Zhao wrote:
> This reverts commit 3ae992d5e1194a16e3d977076eb5722fa6e410d8.
>
> This commit breaks the reset logic for aldebaran, revert it for now.
> Will move the mask inside the reset handler.
Thanks for reverting. Please cc me also for refactored patches for SMU
11.0.7.
Series is
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Thanks,
Lijo
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 ----
> drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 2 --
> drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c | 8 --------
> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 3 ---
> 4 files changed, 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 3ce91f660c3f..0e6ddf05c23c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -274,9 +274,6 @@ extern int amdgpu_vcnfw_log;
> #define AMDGPU_RESET_VCE (1 << 13)
> #define AMDGPU_RESET_VCE1 (1 << 14)
>
> -#define AMDGPU_RESET_LEVEL_SOFT_RECOVERY (1 << 0)
> -#define AMDGPU_RESET_LEVEL_MODE2 (1 << 1)
> -
> /* max cursor sizes (in pixels) */
> #define CIK_CURSOR_WIDTH 128
> #define CIK_CURSOR_HEIGHT 128
> @@ -1065,7 +1062,6 @@ struct amdgpu_device {
>
> struct work_struct reset_work;
>
> - uint32_t amdgpu_reset_level_mask;
> bool job_hang;
> };
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> index 6066aebf491c..de61a85c4b02 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> @@ -1954,8 +1954,6 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
> return PTR_ERR(ent);
> }
>
> - debugfs_create_u32("amdgpu_reset_level", 0600, root, &adev->amdgpu_reset_level_mask);
> -
> /* Register debugfs entries for amdgpu_ttm */
> amdgpu_ttm_debugfs_init(adev);
> amdgpu_debugfs_pm_init(adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
> index 9da5ead50c90..831fb222139c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
> @@ -37,8 +37,6 @@ int amdgpu_reset_init(struct amdgpu_device *adev)
> {
> int ret = 0;
>
> - adev->amdgpu_reset_level_mask = 0x1;
> -
> switch (adev->ip_versions[MP1_HWIP][0]) {
> case IP_VERSION(13, 0, 2):
> ret = aldebaran_reset_init(adev);
> @@ -76,9 +74,6 @@ int amdgpu_reset_prepare_hwcontext(struct amdgpu_device *adev,
> {
> struct amdgpu_reset_handler *reset_handler = NULL;
>
> - if (!(adev->amdgpu_reset_level_mask & AMDGPU_RESET_LEVEL_MODE2))
> - return -ENOSYS;
> -
> if (test_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context->flags))
> return -ENOSYS;
>
> @@ -98,9 +93,6 @@ int amdgpu_reset_perform_reset(struct amdgpu_device *adev,
> int ret;
> struct amdgpu_reset_handler *reset_handler = NULL;
>
> - if (!(adev->amdgpu_reset_level_mask & AMDGPU_RESET_LEVEL_MODE2))
> - return -ENOSYS;
> -
> if (test_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context->flags))
> return -ENOSYS;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> index 3e316b013fd9..d3558c34d406 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> @@ -405,9 +405,6 @@ bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, unsigned int vmid,
> {
> ktime_t deadline = ktime_add_us(ktime_get(), 10000);
>
> - if (!(ring->adev->amdgpu_reset_level_mask & AMDGPU_RESET_LEVEL_SOFT_RECOVERY))
> - return false;
> -
> if (amdgpu_sriov_vf(ring->adev) || !ring->funcs->soft_recovery || !fence)
> return false;
>
next prev parent reply other threads:[~2022-10-13 10:27 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-13 8:27 [PATCH 1/3] Revert "drm/amdgpu: add debugfs amdgpu_reset_level" Victor Zhao
2022-10-13 8:27 ` [PATCH 2/3] Revert "drm/amdgpu: let mode2 reset fallback to default when failure" Victor Zhao
2022-10-13 8:27 ` [PATCH 3/3] drm/amdgpu: Refactor mode2 reset logic for v11.0.7 Victor Zhao
2022-10-13 10:27 ` Lazar, Lijo [this message]
2022-10-13 13:18 ` [PATCH 1/3] Revert "drm/amdgpu: add debugfs amdgpu_reset_level" Deucher, Alexander
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