Re: [PATCH 10/10] drm/amdgpu: enable AGP aperture for GMC9

["Zhang, Jerry (Junwei)" <Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>]

On 08/28/2018 12:53 AM, Christian König wrote:
> Enable the old AGP aperture to avoid GART mappings.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 10 +++++-----
>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c    |  1 +
>   drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 10 +++++-----
>   3 files changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> index 3403ded39d13..ffd0ec9586d1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> @@ -65,16 +65,16 @@ static void gfxhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
>   {
>   	uint64_t value;
>
> -	/* Disable AGP. */
> +	/* Program the AGP BAR */
>   	WREG32_SOC15(GC, 0, mmMC_VM_AGP_BASE, 0);
> -	WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, 0);
> -	WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, 0xFFFFFFFF);
> +	WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
> +	WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
>
>   	/* Program the system aperture low logical page number. */
>   	WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
> -		     adev->gmc.vram_start >> 18);
> +		     min(adev->gmc.vram_start, adev->gmc.agp_start) >> 18);
>   	WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
> -		     adev->gmc.vram_end >> 18);
> +		     max(adev->gmc.vram_end, adev->gmc.agp_end) >> 18);

It may not work for AGP after GART range.

|--- vram ---|--- GART ---|--- AGP ---|

in this case, we may have to replace AGP and GART range.

Regards,
Jerry

>
>   	/* Set default page address. */
>   	value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 60c8f848c102..3f40c153039f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -751,6 +751,7 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
>   		base = mmhub_v1_0_get_fb_location(adev);
>   	amdgpu_gmc_vram_location(adev, &adev->gmc, base);
>   	amdgpu_gmc_gart_location(adev, mc);
> +	amdgpu_gmc_agp_location(adev, mc);
>   	/* base offset of vram pages */
>   	adev->vm_manager.vram_base_offset = gfxhub_v1_0_get_mc_fb_offset(adev);
>   }
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> index 5f6a9c85488f..73d7c075dd33 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> @@ -76,16 +76,16 @@ static void mmhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
>   	uint64_t value;
>   	uint32_t tmp;
>
> -	/* Disable AGP. */
> +	/* Program the AGP BAR */
>   	WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BASE, 0);
> -	WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, 0);
> -	WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, 0x00FFFFFF);
> +	WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
> +	WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
>
>   	/* Program the system aperture low logical page number. */
>   	WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
> -		     adev->gmc.vram_start >> 18);
> +		     min(adev->gmc.vram_start, adev->gmc.agp_start) >> 18);
>   	WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
> -		     adev->gmc.vram_end >> 18);
> +		     max(adev->gmc.vram_end, adev->gmc.agp_end) >> 18);
>
>   	/* Set default page address. */
>   	value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start +
>
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