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[91.14.161.181]) by smtp.gmail.com with ESMTPSA id 17sm2286991wmj.20.2021.08.24.06.18.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 24 Aug 2021 06:18:59 -0700 (PDT) Subject: Re: [PATCH 1/5] drm/sched:add new priority level To: "Das, Nirmoy" , =?UTF-8?Q?Christian_K=c3=b6nig?= , Satyajit Sahu , amd-gfx@lists.freedesktop.org Cc: leo.liu@amd.com, Alexander.Deucher@amd.com, shashank.sharma@amd.com References: <20210824055510.1189185-1-satyajit.sahu@amd.com> <66607af7-5310-629f-1851-df4b74cebf7d@amd.com> <4e2337a6-8d76-49ba-c0b3-e89f4c04b4a0@amd.com> <49509444-2e27-86e6-abe5-8a44dedc0f10@amd.com> <89f6e6e7-662d-995f-a281-7e5712fff772@amd.com> From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: <6223bf14-653c-12c5-d871-483d43aca98f@gmail.com> Date: Tue, 24 Aug 2021 15:18:57 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <89f6e6e7-662d-995f-a281-7e5712fff772@amd.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Am 24.08.21 um 14:39 schrieb Das, Nirmoy: > > On 8/24/2021 2:07 PM, Christian König wrote: >> Am 24.08.21 um 13:57 schrieb Das, Nirmoy: >>> Hi Christian, >>> >>> On 8/24/2021 8:10 AM, Christian König wrote: >>>> I haven't followed the previous discussion, but that looks like >>>> this change is based on a misunderstanding. >>> >>> >>> In previous discussion I sort of suggested to have new DRM prio as I >>> didn't see any other way to map priority provided by the userspace >>> to this new 3rd hw priority. >>> >>> Do you think we should use other information from userspace like >>> queue id to determine hardware priority ? >> >> If I'm not completely mistaken we have dropped the concept of >> exposing multiple queues/instances completely. > > > Yes, that is my understanding too. > >> >> What we should probably do is to use the (cleaned up) UAPI enum for >> init_priority and override_priority instead of the drm scheduler enums. > > > I went through the drm code, now I see what you mean. So what we are > now doing is:  mapping  AMDGPU_CTX_PRIORITY_*  to > DRM_SCHED_PRIORITY_*  and then to hw priority which is not nice. > > We should rather map AMDGPU_CTX_PRIORITY_* to hw priority directly. Exactly that's my idea, yes. If you want feel free to put this on your TODO for a potential cleanup. Christian. > > > Regards, > > Nirmoy > > >> >> Regards, >> Christian. >> >>> >>> >>> Regards, >>> >>> Nirmoy >>> >>>> >>>> Those here are the software priorities used in the scheduler, but >>>> what you are working on are the hardware priorities. >>>> >>>> That are two completely different things which we shouldn't mix up. >>>> >>>> Regards, >>>> Christian. >>>> >>>> Am 24.08.21 um 07:55 schrieb Satyajit Sahu: >>>>> Adding a new priority level DRM_SCHED_PRIORITY_VERY_HIGH >>>>> >>>>> Signed-off-by: Satyajit Sahu >>>>> --- >>>>>   include/drm/gpu_scheduler.h | 1 + >>>>>   1 file changed, 1 insertion(+) >>>>> >>>>> diff --git a/include/drm/gpu_scheduler.h >>>>> b/include/drm/gpu_scheduler.h >>>>> index d18af49fd009..d0e5e234da5f 100644 >>>>> --- a/include/drm/gpu_scheduler.h >>>>> +++ b/include/drm/gpu_scheduler.h >>>>> @@ -40,6 +40,7 @@ enum drm_sched_priority { >>>>>       DRM_SCHED_PRIORITY_MIN, >>>>>       DRM_SCHED_PRIORITY_NORMAL, >>>>>       DRM_SCHED_PRIORITY_HIGH, >>>>> +    DRM_SCHED_PRIORITY_VERY_HIGH, >>>>>       DRM_SCHED_PRIORITY_KERNEL, >>>>>         DRM_SCHED_PRIORITY_COUNT, >>>> >>