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Fri, 15 Mar 2024 12:23:24 +0000 Message-ID: <7190d590-dc75-4b27-965a-2cd2ea465836@amd.com> Date: Fri, 15 Mar 2024 17:53:16 +0530 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/1] drm/amdgpu: drop setting buffer funcs in sdma442 Content-Language: en-US To: "Ma, Le" , "amd-gfx@lists.freedesktop.org" Cc: "Zhang, Hawking" , "Song, Asher" , "Deucher, Alexander" References: <20240315091607.1070927-1-le.ma@amd.com> <9b808afd-8daa-40e2-a4c9-365ef4bd63cd@amd.com> From: "Lazar, Lijo" In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: PN3PR01CA0065.INDPRD01.PROD.OUTLOOK.COM (2603:1096:c01:99::16) To DS0PR12MB7804.namprd12.prod.outlook.com (2603:10b6:8:142::5) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS0PR12MB7804:EE_|SJ2PR12MB8691:EE_ X-MS-Office365-Filtering-Correlation-Id: e43da467-9f6c-4d2c-cef8-08dc44eab5eb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 7l+e2WJ5uPoOVwTxS6e9+Ktw1Gnd+JkgL/Aq3mUD2tPXrTAAejbV40CwTYws2lcx5WwVjApUwov24uWi8JxbxD+oviia54xBFSyMnhNX+H5soyxirc4sEDphq1+hH9o77RKGwo8J/Neac+m5t7VTO0EhPVKPAywalidrRZGO0jVjjGUh9VDnbom3SAFXKA7izT/KhA2Cshj1k6EVTjmghXfgNUuNhJOUtgdILPYo2VJDcIUPs5iDbe+cPYOjE20AyFibcPLDRCMBAfHFT03nw1ocm8Rs1Fs5X/7wtzNzEQl2JwdrDYCDbPPFi5H4SpEOPjJtQan7X8+fyHVjMAk76CviLro48fWPD7E4vuZgccR1EurK5ooC4JcOVkk4K05dlTHxMRd9HsfNA5lMSIbZ3eEm5I1JFhGAA21Cs402d66XiToGHBtghJgkJ/CrIO+vwIqxsc4itTgbMa+Ppm8v9u4QT3SqRbUcC2p4YolfUI+ndj4qLRy4vXRAmCL4ucSG++s5qSzjkqahpe/qIMDf6X/5KfLDXLa9aKZaxWWC68+HygSRhTabj4+m2pOIHOQuZcdvdd3Rg/whQnykNkKZPQek9HEAZRf45J9jsGYX2FY3ygEAWD4pw1O7cbAIG88jWMGnxWMbi5quBhHLfbp9zp8ZuXOm+VjrgBscpRM5eXw= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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_amd-gfx@lists.freedesktop.org_ > >> Cc: Zhang, Hawking <_Hawking.Zhang@amd.com_ >; Song, Asher >> <_Asher.Song@amd.com_ >; Deucher, Alexander > <_Alexander.Deucher@amd.com_ > >> Subject: Re: [PATCH 1/1] drm/amdgpu: drop setting buffer funcs in sdma442 >> >> >> >> On 3/15/2024 2:46 PM, Le Ma wrote: >> > To fix the entity rq NULL issue. This setting has been moved to upper level. >> > >> >> Need to call amdgpu_ttm_set_buffer_funcs_status(adev, true/false) in >> mode-2 reset handlers as well. >   > Thanks for pointing out this. I think we can make another separated > patch to handle it for mode2 since this patch is for alignment purpose. > Actually, the set_buffer_funcs will not be unset/set in reset case as > the conditions below: >   > void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool > enable) > { >         struct ttm_resource_manager *man = > ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM); >         uint64_t size; >         int r; >   >         if (!adev->mman.initialized || amdgpu_in_reset(adev) || >             adev->mman.buffer_funcs_enabled == enable || > adev->gmc.is_app_apu) >                 return; >   >   Thanks for clarifying. In this case, we don't require that since reset() condition is set. I saw amdgpu_ttm_set_buffer_funcs_status(tmp_adev, true) getting called in amdgpu_do_asic_reset(), thought it was affected by reset. Thanks, Lijo >> >> Thanks, >> Lijo >> >> > Fixes b70438004a14 ("drm/amdgpu: move buffer funcs setting up a >> > level") >> > >> > Signed-off-by: Le Ma <_le.ma@amd.com_ > >> > --- >> >  drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 20 +------------------- >> >  1 file changed, 1 insertion(+), 19 deletions(-) >> > >> > diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c >> > b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c >> > index eaa4f5f49949..589a734982a7 100644 >> > --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c >> > +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c >> > @@ -431,16 +431,11 @@ static void sdma_v4_4_2_inst_gfx_stop(struct >> amdgpu_device *adev, >> >      struct amdgpu_ring *sdma[AMDGPU_MAX_SDMA_INSTANCES]; >> >      u32 doorbell_offset, doorbell; >> >      u32 rb_cntl, ib_cntl; >> > -   int i, unset = 0; >> > +   int i; >> > >> >      for_each_inst(i, inst_mask) { >> >              sdma[i] = &adev->sdma.instance[i].ring; >> > >> > -           if ((adev->mman.buffer_funcs_ring == sdma[i]) && unset != 1) { >> > -                   amdgpu_ttm_set_buffer_funcs_status(adev, false); >> > -                   unset = 1; >> > -           } >> > - >> >              rb_cntl = RREG32_SDMA(i, regSDMA_GFX_RB_CNTL); >> >              rb_cntl = REG_SET_FIELD(rb_cntl, SDMA_GFX_RB_CNTL, >> RB_ENABLE, 0); >> >              WREG32_SDMA(i, regSDMA_GFX_RB_CNTL, rb_cntl); @@ - >> 490,17 +485,10 @@ >> > static void sdma_v4_4_2_inst_page_stop(struct amdgpu_device *adev, >> >      struct amdgpu_ring *sdma[AMDGPU_MAX_SDMA_INSTANCES]; >> >      u32 rb_cntl, ib_cntl; >> >      int i; >> > -   bool unset = false; >> > >> >      for_each_inst(i, inst_mask) { >> >              sdma[i] = &adev->sdma.instance[i].page; >> > >> > -           if ((adev->mman.buffer_funcs_ring == sdma[i]) && >> > -                   (!unset)) { >> > -                   amdgpu_ttm_set_buffer_funcs_status(adev, false); >> > -                   unset = true; >> > -           } >> > - >> >              rb_cntl = RREG32_SDMA(i, regSDMA_PAGE_RB_CNTL); >> >              rb_cntl = REG_SET_FIELD(rb_cntl, SDMA_PAGE_RB_CNTL, >> >                                      RB_ENABLE, 0); >> > @@ -950,13 +938,7 @@ static int sdma_v4_4_2_inst_start(struct >> amdgpu_device *adev, >> >                      r = amdgpu_ring_test_helper(page); >> >                      if (r) >> >                              return r; >> > - >> > -                   if (adev->mman.buffer_funcs_ring == page) >> > -                           amdgpu_ttm_set_buffer_funcs_status(adev, >> true); >> >              } >> > - >> > -           if (adev->mman.buffer_funcs_ring == ring) >> > -                   amdgpu_ttm_set_buffer_funcs_status(adev, true); >> >      } >> > >> >      return r;