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([2a02:908:1252:fb60:6e65:9f86:85:5884]) by smtp.gmail.com with ESMTPSA id r17sm6693147wmq.11.2021.11.12.07.03.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 12 Nov 2021 07:03:39 -0800 (PST) Subject: Re: Questions about KMS flip To: =?UTF-8?Q?Michel_D=c3=a4nzer?= , =?UTF-8?Q?Christian_K=c3=b6nig?= , Harry Wentland , "Kazlauskas, Nicholas" , "Yu, Lang" References: <579d0f44-bb85-11b2-d326-35a0b7c5d0de@amd.com> <5c242319-ade3-5621-6429-f77b17c34de5@amd.com> <64e70779-7c33-7849-aa29-aeaee4a89005@amd.com> <4ba7e3f8-7956-882a-6888-57e2448b907d@amd.com> <9a5b8470-d02d-71b4-4a89-6d6c32fdfa5d@daenzer.net> <88dfe9b4-e170-2d6b-604b-03af5d57152b@daenzer.net> From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: <735f8781-982b-a09f-32fe-fded0024a587@gmail.com> Date: Fri, 12 Nov 2021 16:03:37 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <88dfe9b4-e170-2d6b-604b-03af5d57152b@daenzer.net> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel , amd-gfx list Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Am 12.11.21 um 15:30 schrieb Michel Dänzer: > On 2021-11-12 15:29, Michel Dänzer wrote: >> On 2021-11-12 13:47, Christian König wrote: >>> Anyway this unfortunately turned out to be work for Harray and Nicholas. In detail it's about this bug report here: https://bugzilla.kernel.org/show_bug.cgi?id=214621 >>> >>> Lang was able to reproduce the issue and narrow it down to the pin in amdgpu_display_crtc_page_flip_target(). >>> >>> In other words we somehow have an unbalanced pinning of the scanout buffer in DC. >> DC doesn't use amdgpu_display_crtc_page_flip_target AFAICT. The corresponding pin with DC would be in dm_plane_helper_prepare_fb, paired with the unpin in >> dm_plane_helper_cleanup_fb. >> >> >> With non-DC, the pin in amdgpu_display_crtc_page_flip_target is paired with the unpin in dm_plane_helper_cleanup_fb > This should say amdgpu_display_unpin_work_func. Ah! So that is the classic (e.g. non atomic) path? >> & dce_v*_crtc_disable. One thing I notice is that the pin is guarded by if (!adev->enable_virtual_display), but the unpins seem unconditional. So could this be about virtual display, and the problem is actually trying to unpin a BO that was never pinned? Nope, my educated guess is rather that we free up the BO before amdgpu_display_unpin_work_func is called. E.g. not pin unbalance, but rather use after free. Regards, Christian.