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[2001:4c4e:24de:e400:df31:21e4:6476:b2bd]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43d7a6054dfsm6904798f8f.17.2026.04.13.06.09.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Apr 2026 06:09:58 -0700 (PDT) From: Timur =?UTF-8?B?S3Jpc3TDs2Y=?= To: amd-gfx@lists.freedesktop.org, Alex Deucher Cc: Harry Wentland , Leo Li , Aurabindo Pillai , Roman Li , Wayne Lin , Tom Chung , Fangzhi Zuo , Dan Wheeler , Ray Wu , Ivan Lipski , Alex Hung , Roman Li , Alex Hung , David Airlie , Christian Subject: DC analog support regressed by "drm/amd/display: Sync dcn42 with DC 3.2.373" Date: Mon, 13 Apr 2026 15:09:56 +0200 Message-ID: <7370736.9J7NaK4W3v@timur-max> In-Reply-To: <20260306031932.136179-20-alex.hung@amd.com> References: <20260306031932.136179-1-alex.hung@amd.com> <20260306031932.136179-20-alex.hung@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Hi, This patch breaks analog connector support in DCE, both for analog encoders= =20 and DP bridge encoders, because it deletes key functions such as=20 dce110_enable_analog_link_output, dce110_prepare_ddc,=20 dce110_external_encoder_control, and more. With this patch applied, when you connect an analog monitor you just get a= =20 crash in DC from trying to call link->dc->hwss.enable_analog_link_output()= =20 which is now NULL. This is basically undoing all the work I did for supporting old GPUs with D= C. I think either this commit should be reverted or someone should add back th= e=20 analog support bits that were removed. I'm happy to help with that if neede= d. What do you guys think? As a side question, why was this commit merged without any review or ack? Thanks & best regards, Timur On 2026. m=C3=A1rcius 6., p=C3=A9ntek 4:13:45 k=C3=B6z=C3=A9p-eur=C3=B3pai = ny=C3=A1ri id=C5=91 Alex Hung wrote: > From: Roman Li >=20 > This patch provides a bulk merge to align driver > support for DCN42 with Display Core version 3.2.373. >=20 > It includes upgrade for: > - clk_mgr > - dml2/dml21 > - optc > - hubp > - mpc > - optc > - hwseq >=20 > Signed-off-by: Roman Li > Signed-off-by: Alex Hung > --- > .../gpu/drm/amd/display/dc/bios/bios_parser.c | 11 +- > .../display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c | 141 +++-- > .../display/dc/clk_mgr/dcn42/dcn42_clk_mgr.h | 2 +- > drivers/gpu/drm/amd/display/dc/core/dc.c | 95 ++- > .../gpu/drm/amd/display/dc/core/dc_stream.c | 41 +- > .../gpu/drm/amd/display/dc/core/dc_surface.c | 9 + > drivers/gpu/drm/amd/display/dc/dc.h | 59 +- > .../gpu/drm/amd/display/dc/dc_bios_types.h | 3 +- > drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 2 +- > drivers/gpu/drm/amd/display/dc/dc_plane.h | 1 + > drivers/gpu/drm/amd/display/dc/dc_types.h | 24 + > .../amd/display/dc/dccg/dcn401/dcn401_dccg.c | 20 + > .../drm/amd/display/dc/dce/dmub_hw_lock_mgr.c | 16 + > .../drm/amd/display/dc/dce/dmub_hw_lock_mgr.h | 13 + > .../dml2_0/dml21/dml21_translation_helper.c | 30 +- > .../amd/display/dc/dml2_0/dml21/dml21_utils.c | 1 + > .../display/dc/dml2_0/dml21/dml21_wrapper.c | 14 +- > .../dml21/inc/bounding_boxes/dcn42_soc_bb.h | 308 ++++------ > .../dml21/inc/dml_top_display_cfg_types.h | 13 + > .../dc/dml2_0/dml21/inc/dml_top_types.h | 2 + > .../dml21/src/dml2_core/dml2_core_dcn4.c | 204 +++---- > .../dml21/src/dml2_core/dml2_core_factory.c | 1 + > .../dml21/src/dml2_core/dml2_core_utils.c | 63 +- > .../dml21/src/dml2_core/dml2_core_utils.h | 2 + > .../dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c | 1 - > .../dml21/src/dml2_dpmm/dml2_dpmm_factory.c | 1 + > .../dml2_0/dml21/src/dml2_mcg/dml2_mcg_dcn4.h | 2 +- > .../dml21/src/dml2_mcg/dml2_mcg_dcn42.h | 5 +- > .../dml21/src/dml2_mcg/dml2_mcg_factory.c | 1 + > .../dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c | 6 + > .../dml21/src/dml2_pmo/dml2_pmo_factory.c | 4 +- > .../dml21/src/dml2_pmo/dml2_pmo_factory.h | 2 +- > .../dml21/src/dml2_top/dml2_top_interfaces.c | 1 + > .../dml21/src/dml2_top/dml2_top_legacy.c | 1 - > .../src/inc/dml2_internal_shared_types.h | 3 + > .../drm/amd/display/dc/dml2_0/dml2_wrapper.c | 3 +- > .../amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c | 2 + > .../display/dc/dpp/dcn401/dcn401_dpp_dscl.c | 21 + > .../hpo/dcn31/dcn31_hpo_dp_stream_encoder.c | 5 + > .../amd/display/dc/hubp/dcn401/dcn401_hubp.c | 201 ++++--- > .../amd/display/dc/hubp/dcn401/dcn401_hubp.h | 23 +- > .../amd/display/dc/hubp/dcn42/dcn42_hubp.c | 85 ++- > .../amd/display/dc/hubp/dcn42/dcn42_hubp.h | 16 +- > .../amd/display/dc/hwss/dce110/dce110_hwseq.c | 136 +++-- > .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 412 +++++-------- > .../amd/display/dc/hwss/dcn42/dcn42_hwseq.c | 553 +++--------------- > .../amd/display/dc/hwss/dcn42/dcn42_hwseq.h | 10 +- > .../amd/display/dc/hwss/dcn42/dcn42_init.c | 8 +- > drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h | 36 +- > .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h | 18 +- > drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h | 112 ++-- > drivers/gpu/drm/amd/display/dc/inc/resource.h | 1 + > .../amd/display/dc/mpc/dcn401/dcn401_mpc.c | 177 +++--- > .../amd/display/dc/mpc/dcn401/dcn401_mpc.h | 25 +- > .../drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c | 390 ++---------- > .../drm/amd/display/dc/mpc/dcn42/dcn42_mpc.h | 50 +- > .../amd/display/dc/optc/dcn10/dcn10_optc.h | 2 +- > .../amd/display/dc/optc/dcn42/dcn42_optc.c | 105 +++- > .../amd/display/dc/optc/dcn42/dcn42_optc.h | 13 +- > .../dc/resource/dcn42/dcn42_resource.c | 10 +- > .../dcn401/dcn401_soc_and_ip_translator.c | 3 + > .../dcn42/dcn42_soc_and_ip_translator.c | 12 +- > .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 38 +- > .../include/asic_reg/dcn/dcn_4_2_0_offset.h | 2 + > .../include/asic_reg/dcn/dcn_4_2_0_sh_mask.h | 9 + > 65 files changed, 1596 insertions(+), 1984 deletions(-)