amd-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: "Timur Kristóf" <timur.kristof@gmail.com>
To: "Pierre-Eric Pelloux-Prayer" <pierre-eric@damsy.net>,
	"Christian König" <christian.koenig@amd.com>,
	amd-gfx@lists.freedesktop.org,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Alexandre Demers" <alexandre.f.demers@gmail.com>,
	"Rodrigo Siqueira" <siqueira@igalia.com>,
	"Leo Liu" <Leo.Liu@amd.com>
Subject: Re: [PATCH 01/16] drm/amdgpu/gmc: Don't hardcode GART page count before GTT
Date: Tue, 04 Nov 2025 18:10:33 +0100	[thread overview]
Message-ID: <740c84405156456c01ab89c45a087cb75bcad597.camel@gmail.com> (raw)
In-Reply-To: <30d7073e8289db8a2db9d1ae15b33ca50680364c.camel@gmail.com>

On Tue, 2025-11-04 at 16:26 +0100, Timur Kristóf wrote:
> On Tue, 2025-11-04 at 16:08 +0100, Pierre-Eric Pelloux-Prayer wrote:
> > 
> > 
> > Le 04/11/2025 à 14:23, Christian König a écrit :
> > > 
> > > 
> > > On 11/3/25 23:23, Timur Kristóf wrote:
> > > > GART contains some pages in its address space that come before
> > > > the GTT and are used for BO copies.
> > > > 
> > > > Instead of hardcoding the size of the GART space before GTT,
> > > > make it a field in the amdgpu_gmc struct. This allows us to map
> > > > more things in GART before GTT.
> > > > 
> > > > Split this into a separate patch to make it easier to bisect,
> > > > in case there are any errors in the future.
> > > > 
> > > > Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
> > > > ---
> > > >   drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c     | 2 ++
> > > >   drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h     | 1 +
> > > >   drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 2 +-
> > > >   3 files changed, 4 insertions(+), 1 deletion(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> > > > index 97b562a79ea8..bf31bd022d6d 100644
> > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> > > > @@ -325,6 +325,8 @@ void amdgpu_gmc_gart_location(struct
> > > > amdgpu_device *adev, struct amdgpu_gmc *mc,
> > > >   		break;
> > > >   	}
> > > >   
> > > > +	mc->num_gart_pages_before_gtt =
> > > > +		AMDGPU_GTT_MAX_TRANSFER_SIZE *
> > > > AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
> > > >   	mc->gart_start &= ~(four_gb - 1);
> > > >   	mc->gart_end = mc->gart_start + mc->gart_size - 1;
> > > >   	dev_info(adev->dev, "GART: %lluM 0x%016llX -
> > > > 0x%016llX\n",
> > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> > > > index 55097ca10738..568eed3eb557 100644
> > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> > > > @@ -266,6 +266,7 @@ struct amdgpu_gmc {
> > > >   	u64			fb_end;
> > > >   	unsigned		vram_width;
> > > >   	u64			real_vram_size;
> > > > +	u32			num_gart_pages_before_gtt;
> > > >   	int			vram_mtrr;
> > > >   	u64                     mc_mask;
> > > >   	const struct firmware   *fw;	/* MC firmware */
> > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> > > > index 0760e70402ec..4c2563a70c2b 100644
> > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
> > > > @@ -283,7 +283,7 @@ int amdgpu_gtt_mgr_init(struct
> > > > amdgpu_device
> > > > *adev, uint64_t gtt_size)
> > > >   
> > > >   	ttm_resource_manager_init(man, &adev->mman.bdev,
> > > > gtt_size);
> > > >   
> > > > -	start = AMDGPU_GTT_MAX_TRANSFER_SIZE *
> > > > AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
> > > > +	start = adev->gmc.num_gart_pages_before_gtt;
> > > 
> > > I would prefer that we have a single function which returns the
> > > number of GART pages we need before the dynamic GTT mapping.
> > > 
> > > But let me see how Pierre-Eric solved this first.
> > > 
> > 
> > The only conflicting change with my series is that I changed this:
> > 
> > -	start = AMDGPU_GTT_MAX_TRANSFER_SIZE *
> > AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
> > +	start = AMDGPU_GTT_MAX_TRANSFER_SIZE * reserved_windows;
> > 
> > So to account for Timur's change, I would only need to adapt this
> > part:
> > 
> > +	mc->num_gart_pages_before_gtt =
> > +		AMDGPU_GTT_MAX_TRANSFER_SIZE * reserved_windows;
> > 
> 
> Hi Christian & Pierre-Eric,
> 
> I assume this conversation is about the following series:
> drm/amdgpu: use all SDMA instances for TTM clears and moves
> 
> My question is, which series do we want to land first? I would really
> like VCE1 to get into Linux 6.19, but otherwise I'm OK with either of
> these two options:
> 
> 1. If Pierre-Eric's series lands sooner: I'm happy to rebase my work
> and use Pierre-Eric's solution.
> 2. If my series lands first: I'm happy to contribute a patch to
> Pierre-
> Eric's series to adapt my workaround to his solution, if that helps.
> 
> Please let me know how you guys prefer to proceed.
> 
> Thanks & best regards,
> Timur

We just had a conversation with Christian and Pierre-Eric about this.
We arrived at the following suggested solution:

1. Add a new function to the VCE code which returns the amount of GTT
pages the VCE needs in the GART before GTT. The function would return
the amound of pages necessary for this "hack" on VCE1, and 0 on other
VCE versions.
2. Call that function from amdgpu_gtt_mgr_init(), and add the result to
the "start" variable there.
3. Then there is no need for a "num_gart_pages_before_gtt" variable.

If everyone agrees with this, I will do that in the next version of
this series.


> 
> > > 
> > > >   	size = (adev->gmc.gart_size >> PAGE_SHIFT) - start;
> > > >   	drm_mm_init(&mgr->mm, start, size);
> > > >   	spin_lock_init(&mgr->lock);

  reply	other threads:[~2025-11-04 17:10 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-03 22:23 [PATCH 00/16] drm/amdgpu: Support VCE1 IP block (v2) Timur Kristóf
2025-11-03 22:23 ` [PATCH 01/16] drm/amdgpu/gmc: Don't hardcode GART page count before GTT Timur Kristóf
2025-11-04 13:23   ` Christian König
2025-11-04 15:08     ` Pierre-Eric Pelloux-Prayer
2025-11-04 15:24       ` Christian König
2025-11-04 15:37         ` Pierre-Eric Pelloux-Prayer
2025-11-04 15:26       ` Timur Kristóf
2025-11-04 17:10         ` Timur Kristóf [this message]
2025-11-03 22:23 ` [PATCH 02/16] drm/amdgpu/gmc6: Place gart at low address range Timur Kristóf
2025-11-03 22:23 ` [PATCH 03/16] drm/amdgpu/gmc6: Add GART space for VCPU BO (v2) Timur Kristóf
2025-11-03 22:23 ` [PATCH 04/16] drm/amdgpu/gart: Add helper to bind VRAM pages (v2) Timur Kristóf
2025-11-04 13:32   ` Christian König
2025-11-03 22:23 ` [PATCH 05/16] drm/amdgpu/ttm: Use GART helper to map " Timur Kristóf
2025-11-04 13:33   ` Christian König
2025-11-04 15:11     ` Timur Kristóf
2025-11-03 22:23 ` [PATCH 06/16] drm/amdgpu/vce: Clear VCPU BO before copying firmware to it (v2) Timur Kristóf
2025-11-03 22:23 ` [PATCH 07/16] drm/amdgpu/vce: Move firmware load to amdgpu_vce_early_init Timur Kristóf
2025-11-03 22:23 ` [PATCH 08/16] drm/amdgpu/vce: Save/restore and pin VCPU BO for all VCE (v2) Timur Kristóf
2025-11-03 22:23 ` [PATCH 09/16] drm/amdgpu/si, cik, vi: Verify IP block when querying video codecs (v2) Timur Kristóf
2025-11-04 13:44   ` Christian König
2025-11-04 15:16     ` [PATCH 09/16] drm/amdgpu/si,cik,vi: " Timur Kristóf
2025-11-04 15:27       ` [PATCH 09/16] drm/amdgpu/si, cik, vi: " Alex Deucher
2025-11-04 15:29         ` Christian König
2025-11-04 15:33           ` Alex Deucher
2025-11-03 22:23 ` [PATCH 10/16] drm/amdgpu/vce1: Clean up register definitions Timur Kristóf
2025-11-03 22:23 ` [PATCH 11/16] drm/amdgpu/vce1: Load VCE1 firmware Timur Kristóf
2025-11-03 22:23 ` [PATCH 12/16] drm/amdgpu/vce1: Implement VCE1 IP block (v2) Timur Kristóf
2025-11-04 13:51   ` Christian König
2025-11-03 22:23 ` [PATCH 13/16] drm/amdgpu/vce1: Ensure VCPU BO is in lower 32-bit address space (v2) Timur Kristóf
2025-11-03 22:23 ` [PATCH 14/16] drm/amd/pm/si: Hook up VCE1 to SI DPM Timur Kristóf
2025-11-03 22:23 ` [PATCH 15/16] drm/amdgpu/vce1: Enable VCE1 on Tahiti, Pitcairn, Cape Verde GPUs Timur Kristóf
2025-11-03 22:23 ` [PATCH 16/16] drm/amdgpu/vce1: Workaround PLL timeout on FirePro W9000 Timur Kristóf

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=740c84405156456c01ab89c45a087cb75bcad597.camel@gmail.com \
    --to=timur.kristof@gmail.com \
    --cc=Leo.Liu@amd.com \
    --cc=alexander.deucher@amd.com \
    --cc=alexandre.f.demers@gmail.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=christian.koenig@amd.com \
    --cc=pierre-eric@damsy.net \
    --cc=siqueira@igalia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).