From: "Christian König" <christian.koenig@amd.com>
To: "Friedrich Vock" <friedrich.vock@gmx.de>,
"Joshua Ashton" <joshua@froggi.es>,
"Felix Kuehling" <felix.kuehling@amd.com>,
"Christian König" <ckoenig.leichtzumerken@gmail.com>,
"Alex Deucher" <alexdeucher@gmail.com>,
"Dommati, Sunil-kumar" <Sunil-kumar.Dommati@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>, amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/amdgpu: Reset IH OVERFLOW_CLEAR bit after writing rptr
Date: Tue, 23 Jan 2024 13:49:59 +0100 [thread overview]
Message-ID: <7483cddf-010e-4df0-80ed-468f744449d8@amd.com> (raw)
In-Reply-To: <e8d1bca4-61f1-4b44-b70b-c66f8b095860@gmx.de>
Am 23.01.24 um 12:35 schrieb Friedrich Vock:
> On 23.01.24 10:36, Christian König wrote:
>>
>>
>> Am 22.01.24 um 23:39 schrieb Joshua Ashton:
>>> [SNIP]
>>>>>
>>>>> Most work submissions in practice submit more waves than the
>>>>> number of
>>>>> wave slots the GPU has.
>>>>> As far as I understand soft recovery, the only thing it does is
>>>>> kill all
>>>>> active waves. This frees up the CUs so more waves are launched, which
>>>>> can fault again, and that leads to potentially lots of faults for a
>>>>> single wave slot in the end.
>>>>
>>>> Exactly that, but killing each wave takes a moment since we do that
>>>> in a loop with a bit delay in there.
>>>>
>>>> So the interrupt handler should at least in theory have time to
>>>> catch up.
>>>
>>> I don't think there is any delay in that loop is there?
>>
>> Mhm, looks like I remember that incorrectly.
>>
>>>
>>> while (!dma_fence_is_signaled(fence) &&
>>> ktime_to_ns(ktime_sub(deadline, ktime_get())) > 0)
>>> ring->funcs->soft_recovery(ring, vmid);
>>>
>>> (soft_recovery function does not have a delay/sleep/whatever either)
>>>
>>> FWIW, two other changes we did in SteamOS to make recovery more
>>> reliable on VANGOGH was:
>>>
>>> 1) Move the timeout determination after the spinlock setting the
>>> fence error.
>>
>> Well that should not really have any effect.
>>
>>>
>>> 2) Raise the timeout from 0.1s to 1s.
>>
>> Well that's not necessarily a good idea. If the SQ isn't able to
>> respond in 100ms then I would really go into a hard reset.
>>
>> Waiting one extra second is way to long here.
>
> Bumping the timeout seemed to be necessary in order to reliably
> soft-recover from hangs with page faults. (Being able to soft-recover
> from these is actually a really good thing, because if e.g. games
> accidentally trigger faults, it won't kill a user's entire system.)
I still have an extremely bad feeling about that. From the discussions a
wave which waits for a fault resolution can't be preempted nor killed.
So what most likely happens is that some of the state sticks around in
the hw and can only be cleared with a hard recovery.
For the steam deck it might still be the better option but that is most
likely not the best solution for every use case. It could for example be
that the system doesn't have the full performance any more.
>
> However, the bump I had in mind was more moderate: Currently the timeout
> is 10ms (=0.01s). Bumping that to 0.1s already improves reliability
> enough. I agree that waiting a full second before giving up might be a
> bit too long.
Well we should never have a timeout longer than we would expect a
submission to be. So assuming a minimum of 10fps we should never go over
100ms or so.
If killing the waves takes longer than the original submission would
have then there is most likely some state not correctly cleared in the
hw and we really have to do a hard reset to clean up.
Regards,
Christian.
>
> Regards,
> Friedrich
>
>>
>> Regards,
>> Christian.
>>
>>>
>>> - Joshie 🐸✨
>>>
>>>
>>>>
>>>> Regards,
>>>> Christian.
>>>>
>>>>>
>>>>> Regards,
>>>>> Friedrich
>>>
>>
next prev parent reply other threads:[~2024-01-23 12:50 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-14 13:00 [PATCH 1/2] drm/amdgpu: Reset IH OVERFLOW_CLEAR bit after writing rptr Friedrich Vock
2024-01-14 13:00 ` [PATCH 2/2] drm/amdgpu: Process fences on IH overflow Friedrich Vock
2024-01-15 10:26 ` Christian König
2024-01-15 11:19 ` Friedrich Vock
2024-01-16 7:17 ` Christian König
[not found] ` <69cec077-4011-4738-bbb0-8fb1e6f52159@gmail.com>
2024-01-15 11:18 ` [PATCH 1/2] drm/amdgpu: Reset IH OVERFLOW_CLEAR bit after writing rptr Friedrich Vock
2024-01-16 7:03 ` Christian König
2024-01-16 10:31 ` Friedrich Vock
2024-01-17 12:27 ` Christian König
2024-01-17 23:00 ` Alex Deucher
2024-01-17 23:44 ` Friedrich Vock
2024-01-18 12:07 ` Christian König
2024-01-19 19:18 ` Felix Kuehling
2024-01-22 10:10 ` Christian König
2024-01-22 10:21 ` Friedrich Vock
2024-01-22 10:45 ` Friedrich Vock
2024-01-22 13:35 ` Christian König
2024-01-22 22:39 ` Joshua Ashton
2024-01-23 9:36 ` Christian König
2024-01-23 11:35 ` Friedrich Vock
2024-01-23 12:49 ` Christian König [this message]
2024-02-02 11:11 ` Joshua Ashton
2024-02-02 13:31 ` Christian König
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