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Mon, 7 Sep 2026 07:43:59 +0000 Message-ID: <77bd73f2-3e33-4c78-adaa-634b381ea5b8@amd.com> Date: Mon, 7 Sep 2026 09:43:55 +0200 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/5] drm/amdgpu: Delete SI/CIK/VI IH soft_reset() code To: =?UTF-8?Q?Timur_Krist=C3=B3f?= , amd-gfx@lists.freedesktop.org, Alexander.Deucher@amd.com, Natalie Vock , Tvrtko Ursulin , Felix Kuehling , Lijo Lazar References: <20260904183409.571117-1-timur.kristof@gmail.com> Content-Language: en-US From: =?UTF-8?Q?Christian_K=C3=B6nig?= In-Reply-To: <20260904183409.571117-1-timur.kristof@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: FR4P281CA0286.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:e7::13) To PH7PR12MB5685.namprd12.prod.outlook.com (2603:10b6:510:13c::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH7PR12MB5685:EE_|DM4PR12MB6423:EE_ X-MS-Office365-Filtering-Correlation-Id: 875bf16a-5257-44cf-c91f-08df0cb3c772 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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It's unclear what the original intention > was or why the IH block would ever need to be reset. > > All SI/CIK/VI GPUs have been working well for > 10+ years without ever resetting the IH block > so it's time to just delete the dead code. > > Signed-off-by: Timur Kristóf Acked-by: Christian König for the entire series. @Alex do you pick them up or should I? Thanks, Christian. > --- > drivers/gpu/drm/amd/amdgpu/cik_ih.c | 31 ------------------------ > drivers/gpu/drm/amd/amdgpu/cz_ih.c | 31 ------------------------ > drivers/gpu/drm/amd/amdgpu/iceland_ih.c | 31 ------------------------ > drivers/gpu/drm/amd/amdgpu/si_ih.c | 30 ----------------------- > drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 32 ------------------------- > 5 files changed, 155 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/cik_ih.c b/drivers/gpu/drm/amd/amdgpu/cik_ih.c > index 314d8f1d64cc..73ec61bc69de 100644 > --- a/drivers/gpu/drm/amd/amdgpu/cik_ih.c > +++ b/drivers/gpu/drm/amd/amdgpu/cik_ih.c > @@ -373,36 +373,6 @@ static int cik_ih_wait_for_idle(struct amdgpu_ip_block *ip_block) > return -ETIMEDOUT; > } > > -static int cik_ih_soft_reset(struct amdgpu_ip_block *ip_block) > -{ > - struct amdgpu_device *adev = ip_block->adev; > - > - u32 srbm_soft_reset = 0; > - u32 tmp = RREG32(mmSRBM_STATUS); > - > - if (tmp & SRBM_STATUS__IH_BUSY_MASK) > - srbm_soft_reset |= SRBM_SOFT_RESET__SOFT_RESET_IH_MASK; > - > - if (srbm_soft_reset) { > - tmp = RREG32(mmSRBM_SOFT_RESET); > - tmp |= srbm_soft_reset; > - dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); > - WREG32(mmSRBM_SOFT_RESET, tmp); > - tmp = RREG32(mmSRBM_SOFT_RESET); > - > - udelay(50); > - > - tmp &= ~srbm_soft_reset; > - WREG32(mmSRBM_SOFT_RESET, tmp); > - tmp = RREG32(mmSRBM_SOFT_RESET); > - > - /* Wait a little for things to settle down */ > - udelay(50); > - } > - > - return 0; > -} > - > static int cik_ih_set_clockgating_state(struct amdgpu_ip_block *ip_block, > enum amd_clockgating_state state) > { > @@ -425,7 +395,6 @@ static const struct amd_ip_funcs cik_ih_ip_funcs = { > .suspend = cik_ih_suspend, > .resume = cik_ih_resume, > .wait_for_idle = cik_ih_wait_for_idle, > - .soft_reset = cik_ih_soft_reset, > .set_clockgating_state = cik_ih_set_clockgating_state, > .set_powergating_state = cik_ih_set_powergating_state, > }; > diff --git a/drivers/gpu/drm/amd/amdgpu/cz_ih.c b/drivers/gpu/drm/amd/amdgpu/cz_ih.c > index 8d02602f8433..82bff26abd5e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/cz_ih.c > +++ b/drivers/gpu/drm/amd/amdgpu/cz_ih.c > @@ -367,36 +367,6 @@ static int cz_ih_wait_for_idle(struct amdgpu_ip_block *ip_block) > return -ETIMEDOUT; > } > > -static int cz_ih_soft_reset(struct amdgpu_ip_block *ip_block) > -{ > - u32 srbm_soft_reset = 0; > - struct amdgpu_device *adev = ip_block->adev; > - u32 tmp = RREG32(mmSRBM_STATUS); > - > - if (tmp & SRBM_STATUS__IH_BUSY_MASK) > - srbm_soft_reset = REG_SET_FIELD(srbm_soft_reset, SRBM_SOFT_RESET, > - SOFT_RESET_IH, 1); > - > - if (srbm_soft_reset) { > - tmp = RREG32(mmSRBM_SOFT_RESET); > - tmp |= srbm_soft_reset; > - dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); > - WREG32(mmSRBM_SOFT_RESET, tmp); > - tmp = RREG32(mmSRBM_SOFT_RESET); > - > - udelay(50); > - > - tmp &= ~srbm_soft_reset; > - WREG32(mmSRBM_SOFT_RESET, tmp); > - tmp = RREG32(mmSRBM_SOFT_RESET); > - > - /* Wait a little for things to settle down */ > - udelay(50); > - } > - > - return 0; > -} > - > static int cz_ih_set_clockgating_state(struct amdgpu_ip_block *ip_block, > enum amd_clockgating_state state) > { > @@ -421,7 +391,6 @@ static const struct amd_ip_funcs cz_ih_ip_funcs = { > .suspend = cz_ih_suspend, > .resume = cz_ih_resume, > .wait_for_idle = cz_ih_wait_for_idle, > - .soft_reset = cz_ih_soft_reset, > .set_clockgating_state = cz_ih_set_clockgating_state, > .set_powergating_state = cz_ih_set_powergating_state, > }; > diff --git a/drivers/gpu/drm/amd/amdgpu/iceland_ih.c b/drivers/gpu/drm/amd/amdgpu/iceland_ih.c > index 49002c80dc71..29faaa726644 100644 > --- a/drivers/gpu/drm/amd/amdgpu/iceland_ih.c > +++ b/drivers/gpu/drm/amd/amdgpu/iceland_ih.c > @@ -361,36 +361,6 @@ static int iceland_ih_wait_for_idle(struct amdgpu_ip_block *ip_block) > return -ETIMEDOUT; > } > > -static int iceland_ih_soft_reset(struct amdgpu_ip_block *ip_block) > -{ > - u32 srbm_soft_reset = 0; > - struct amdgpu_device *adev = ip_block->adev; > - u32 tmp = RREG32(mmSRBM_STATUS); > - > - if (tmp & SRBM_STATUS__IH_BUSY_MASK) > - srbm_soft_reset = REG_SET_FIELD(srbm_soft_reset, SRBM_SOFT_RESET, > - SOFT_RESET_IH, 1); > - > - if (srbm_soft_reset) { > - tmp = RREG32(mmSRBM_SOFT_RESET); > - tmp |= srbm_soft_reset; > - dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); > - WREG32(mmSRBM_SOFT_RESET, tmp); > - tmp = RREG32(mmSRBM_SOFT_RESET); > - > - udelay(50); > - > - tmp &= ~srbm_soft_reset; > - WREG32(mmSRBM_SOFT_RESET, tmp); > - tmp = RREG32(mmSRBM_SOFT_RESET); > - > - /* Wait a little for things to settle down */ > - udelay(50); > - } > - > - return 0; > -} > - > static int iceland_ih_set_clockgating_state(struct amdgpu_ip_block *ip_block, > enum amd_clockgating_state state) > { > @@ -413,7 +383,6 @@ static const struct amd_ip_funcs iceland_ih_ip_funcs = { > .suspend = iceland_ih_suspend, > .resume = iceland_ih_resume, > .wait_for_idle = iceland_ih_wait_for_idle, > - .soft_reset = iceland_ih_soft_reset, > .set_clockgating_state = iceland_ih_set_clockgating_state, > .set_powergating_state = iceland_ih_set_powergating_state, > }; > diff --git a/drivers/gpu/drm/amd/amdgpu/si_ih.c b/drivers/gpu/drm/amd/amdgpu/si_ih.c > index 52118765dccf..2c5ac398b582 100644 > --- a/drivers/gpu/drm/amd/amdgpu/si_ih.c > +++ b/drivers/gpu/drm/amd/amdgpu/si_ih.c > @@ -247,35 +247,6 @@ static int si_ih_wait_for_idle(struct amdgpu_ip_block *ip_block) > return -ETIMEDOUT; > } > > -static int si_ih_soft_reset(struct amdgpu_ip_block *ip_block) > -{ > - struct amdgpu_device *adev = ip_block->adev; > - > - u32 srbm_soft_reset = 0; > - u32 tmp = RREG32(mmSRBM_STATUS); > - > - if (tmp & SRBM_STATUS__IH_BUSY_MASK) > - srbm_soft_reset |= SRBM_SOFT_RESET__SOFT_RESET_IH_MASK; > - > - if (srbm_soft_reset) { > - tmp = RREG32(mmSRBM_SOFT_RESET); > - tmp |= srbm_soft_reset; > - dev_info(adev->dev, "mmSRBM_SOFT_RESET=0x%08X\n", tmp); > - WREG32(mmSRBM_SOFT_RESET, tmp); > - tmp = RREG32(mmSRBM_SOFT_RESET); > - > - udelay(50); > - > - tmp &= ~srbm_soft_reset; > - WREG32(mmSRBM_SOFT_RESET, tmp); > - tmp = RREG32(mmSRBM_SOFT_RESET); > - > - udelay(50); > - } > - > - return 0; > -} > - > static int si_ih_set_clockgating_state(struct amdgpu_ip_block *ip_block, > enum amd_clockgating_state state) > { > @@ -298,7 +269,6 @@ static const struct amd_ip_funcs si_ih_ip_funcs = { > .suspend = si_ih_suspend, > .resume = si_ih_resume, > .wait_for_idle = si_ih_wait_for_idle, > - .soft_reset = si_ih_soft_reset, > .set_clockgating_state = si_ih_set_clockgating_state, > .set_powergating_state = si_ih_set_powergating_state, > }; > diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c > index d84c08698dff..194487a71fd4 100644 > --- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c > +++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c > @@ -379,37 +379,6 @@ static int tonga_ih_wait_for_idle(struct amdgpu_ip_block *ip_block) > return -ETIMEDOUT; > } > > -static int tonga_ih_soft_reset(struct amdgpu_ip_block *ip_block) > -{ > - struct amdgpu_device *adev = ip_block->adev; > - u32 srbm_soft_reset; > - > - if (!adev->irq.srbm_soft_reset) > - return 0; > - srbm_soft_reset = adev->irq.srbm_soft_reset; > - > - if (srbm_soft_reset) { > - u32 tmp; > - > - tmp = RREG32(mmSRBM_SOFT_RESET); > - tmp |= srbm_soft_reset; > - dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp); > - WREG32(mmSRBM_SOFT_RESET, tmp); > - tmp = RREG32(mmSRBM_SOFT_RESET); > - > - udelay(50); > - > - tmp &= ~srbm_soft_reset; > - WREG32(mmSRBM_SOFT_RESET, tmp); > - tmp = RREG32(mmSRBM_SOFT_RESET); > - > - /* Wait a little for things to settle down */ > - udelay(50); > - } > - > - return 0; > -} > - > static int tonga_ih_set_clockgating_state(struct amdgpu_ip_block *ip_block, > enum amd_clockgating_state state) > { > @@ -432,7 +401,6 @@ static const struct amd_ip_funcs tonga_ih_ip_funcs = { > .suspend = tonga_ih_suspend, > .resume = tonga_ih_resume, > .wait_for_idle = tonga_ih_wait_for_idle, > - .soft_reset = tonga_ih_soft_reset, > .set_clockgating_state = tonga_ih_set_clockgating_state, > .set_powergating_state = tonga_ih_set_powergating_state, > };