Re: [PATCH] drm/amdgpu: access register without KIQ

From: "Christian König" <ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Emily Deng <Emily.Deng-5C7GfCeVMHo@public.gmane.org>,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: Re: [PATCH] drm/amdgpu: access register without KIQ
Date: Wed, 12 Dec 2018 09:55:55 +0100	[thread overview]
Message-ID: <7b688fe0-4cb5-db54-dfd4-c74f1cd181c1@gmail.com> (raw)
In-Reply-To: <1544604887-1694-1-git-send-email-Emily.Deng-5C7GfCeVMHo@public.gmane.org>

Am 12.12.18 um 09:54 schrieb Emily Deng:
> There is no need to access register such as mmSMC_IND_INDEX_11
> and mmSMC_IND_DATA_11, PCIE_INDEX, PCIE_DATA through KIQ because
> they are VF-copy.
>
> Signed-off-by: Emily Deng <Emily.Deng@amd.com>

Acked-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/vi.c | 18 +++++++++---------
>   1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
> index ff2906c..77e3674 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vi.c
> @@ -87,9 +87,9 @@ static u32 vi_pcie_rreg(struct amdgpu_device *adev, u32 reg)
>   	u32 r;
>   
>   	spin_lock_irqsave(&adev->pcie_idx_lock, flags);
> -	WREG32(mmPCIE_INDEX, reg);
> -	(void)RREG32(mmPCIE_INDEX);
> -	r = RREG32(mmPCIE_DATA);
> +	WREG32_NO_KIQ(mmPCIE_INDEX, reg);
> +	(void)RREG32_NO_KIQ(mmPCIE_INDEX);
> +	r = RREG32_NO_KIQ(mmPCIE_DATA);
>   	spin_unlock_irqrestore(&adev->pcie_idx_lock, flags);
>   	return r;
>   }
> @@ -99,10 +99,10 @@ static void vi_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
>   	unsigned long flags;
>   
>   	spin_lock_irqsave(&adev->pcie_idx_lock, flags);
> -	WREG32(mmPCIE_INDEX, reg);
> -	(void)RREG32(mmPCIE_INDEX);
> -	WREG32(mmPCIE_DATA, v);
> -	(void)RREG32(mmPCIE_DATA);
> +	WREG32_NO_KIQ(mmPCIE_INDEX, reg);
> +	(void)RREG32_NO_KIQ(mmPCIE_INDEX);
> +	WREG32_NO_KIQ(mmPCIE_DATA, v);
> +	(void)RREG32_NO_KIQ(mmPCIE_DATA);
>   	spin_unlock_irqrestore(&adev->pcie_idx_lock, flags);
>   }
>   
> @@ -123,8 +123,8 @@ static void vi_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
>   	unsigned long flags;
>   
>   	spin_lock_irqsave(&adev->smc_idx_lock, flags);
> -	WREG32(mmSMC_IND_INDEX_11, (reg));
> -	WREG32(mmSMC_IND_DATA_11, (v));
> +	WREG32_NO_KIQ(mmSMC_IND_INDEX_11, (reg));
> +	WREG32_NO_KIQ(mmSMC_IND_DATA_11, (v));
>   	spin_unlock_irqrestore(&adev->smc_idx_lock, flags);
>   }
>   

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx