Re: [PATCH 21/21] drm/amdgpu: add PASID mapping for GFX v8

[Chunming Zhou <zhoucm1-5C7GfCeVMHo@public.gmane.org>]

gmc8, gmc9, not gfx...


On 2018年01月17日 14:13, Chunming Zhou wrote:
> and please fix patch #21 title, which should be gfx9 not gfx8.
>
>
> On 2018年01月17日 14:11, Chunming Zhou wrote:
>> patch #19, #20, #21 are Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
>>
>>
>> On 2018年01月17日 03:40, Christian König wrote:
>>> This way we can see the PASID in VM faults.
>>>
>>> Signed-off-by: Christian König <christian.koenig@amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 12 +++++++++++-
>>>   1 file changed, 11 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
>>> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> index f7bcfa53eff0..2efbecf486c5 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>>> @@ -33,6 +33,7 @@
>>>   #include "vega10_enum.h"
>>>   #include "mmhub/mmhub_1_0_offset.h"
>>>   #include "athub/athub_1_0_offset.h"
>>> +#include "oss/osssys_4_0_offset.h"
>>>     #include "soc15.h"
>>>   #include "soc15_common.h"
>>> @@ -369,10 +370,12 @@ static uint64_t 
>>> gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
>>>                           unsigned vmid, unsigned pasid,
>>>                           uint64_t pd_addr)
>>>   {
>>> -    struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
>>> +    struct amdgpu_device *adev = ring->adev;
>>> +    struct amdgpu_vmhub *hub = &adev->vmhub[ring->funcs->vmhub];
>>>       uint32_t req = gmc_v9_0_get_invalidate_req(vmid);
>>>       uint64_t flags = AMDGPU_PTE_VALID;
>>>       unsigned eng = ring->vm_inv_eng;
>>> +    uint32_t reg;
>>>         amdgpu_gmc_get_vm_pde(ring->adev, -1, &pd_addr, &flags);
>>>       pd_addr |= flags;
>>> @@ -383,6 +386,13 @@ static uint64_t 
>>> gmc_v9_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
>>>       amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + (2 * vmid),
>>>                     upper_32_bits(pd_addr));
>>>   +    if (ring->funcs->vmhub == AMDGPU_GFXHUB)
>>> +        reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT) + vmid;
>>> +    else
>>> +        reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT_MM) + vmid;
>>> +
>>> +    amdgpu_ring_emit_wreg(ring, reg, pasid);
>>> +
>>>       amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_req + eng, req);
>>>         return pd_addr;
>>
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>
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