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From: "Christian König" <christian.koenig@amd.com>
To: Chong Li <chongli2@amd.com>, amd-gfx@lists.freedesktop.org
Cc: lincao12@amd.com
Subject: Re: [PATCH] drm/amd/amdgpu: change the flush gpu tlb mode to sync mode.
Date: Mon, 21 Oct 2024 10:00:00 +0200	[thread overview]
Message-ID: <7cf21ef7-c43a-4ab8-b439-c845f0b429fa@amd.com> (raw)
In-Reply-To: <20241021055644.158966-1-chongli2@amd.com>

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Am 21.10.24 um 07:56 schrieb Chong Li:
> change the gpu tlb flush mode to sync mode to
> solve the issue in the rocm stress test.

And again complete NAK to this.

I've already proven together with Andjelkovic that the problem is that 
the rocm stress test is broken.

The test tries to access memory before it is probably mapped and that is 
provable by looking into the tracelogs.

Regards,
Christian.

>
> Signed-off-by: Chong Li<chongli2@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c
> index 51cddfa3f1e8..4d9ff7b31618 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c
> @@ -98,7 +98,6 @@ void amdgpu_vm_tlb_fence_create(struct amdgpu_device *adev, struct amdgpu_vm *vm
>   	f->adev = adev;
>   	f->dependency = *fence;
>   	f->pasid = vm->pasid;
> -	INIT_WORK(&f->work, amdgpu_tlb_fence_work);
>   	spin_lock_init(&f->lock);
>   
>   	dma_fence_init(&f->base, &amdgpu_tlb_fence_ops, &f->lock,
> @@ -106,7 +105,8 @@ void amdgpu_vm_tlb_fence_create(struct amdgpu_device *adev, struct amdgpu_vm *vm
>   
>   	/* TODO: We probably need a separate wq here */
>   	dma_fence_get(&f->base);
> -	schedule_work(&f->work);
>   
>   	*fence = &f->base;
> +
> +	amdgpu_tlb_fence_work(&f->work);
>   }

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  reply	other threads:[~2024-10-21  8:00 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-21  5:56 [PATCH] drm/amd/amdgpu: change the flush gpu tlb mode to sync mode Chong Li
2024-10-21  8:00 ` Christian König [this message]
2024-10-21  9:02   ` Li, Chong(Alan)
2024-10-21 10:08     ` Christian König
     [not found]       ` <DS7PR12MB57687EE5E003280FA4BBCDCD9B432@DS7PR12MB5768.namprd12.prod.outlook.com>
     [not found]         ` <DS7PR12MB57686BB80A2550A59BBEAE2A9B4D2@DS7PR12MB5768.namprd12.prod.outlook.com>
     [not found]           ` <ed87757e-2f1f-4084-a863-cea858648d31@amd.com>
     [not found]             ` <DS7PR12MB57680B09EDA58A48ECEAD0019B4E2@DS7PR12MB5768.namprd12.prod.outlook.com>
     [not found]               ` <24840999-9eb3-4e9c-a134-9eb78f13f8f8@amd.com>
2024-10-25  6:46                 ` Li, Chong(Alan)
2024-10-31  9:54                   ` Li, Chong(Alan)
2024-10-31 10:03                     ` Christian König
2024-11-04  6:43                       ` [PATCH] drm/amdgpu: fix return ramdom value when multiple threads read registers via mes Li, Chong(Alan)
2024-11-04 10:22                         ` Christian König
2024-11-04 10:54                           ` Li, Chong(Alan)
2024-11-04 13:15                             ` Christian König

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