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[165.204.72.6]) by smtp.gmail.com with ESMTPSA id j17-20020a5d6191000000b0033d4cf751b2sm13476416wru.33.2024.02.27.22.38.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 27 Feb 2024 22:38:11 -0800 (PST) Message-ID: <7e13e8d8-e486-4739-9844-f0b95861d34c@gmail.com> Date: Wed, 28 Feb 2024 07:38:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] Revert "drm/amd: Remove freesync video mode amdgpu parameter" Content-Language: en-US To: Alex Deucher , amd-gfx@lists.freedesktop.org References: <20240227184847.3078099-1-alexander.deucher@amd.com> From: =?UTF-8?Q?Christian_K=C3=B6nig?= In-Reply-To: <20240227184847.3078099-1-alexander.deucher@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Am 27.02.24 um 19:48 schrieb Alex Deucher: > This reverts commit e94e787e37b99645e7c02d20d0a1ba0f8a18a82a. > > This conflicts with how compositors want to handle VRR. Now > that compositors actually handle VRR, we probably don't need > freesync video. > > Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/2985 Scratching my head what actually happens here? Doesn't the problem then just depend on a module parameter? Regards, Christian. > Signed-off-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 27 +++++++++++++++++++++++++ > 2 files changed, 28 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > index 0e365cadcc3fc..925026c183f41 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > @@ -194,6 +194,7 @@ extern int amdgpu_emu_mode; > extern uint amdgpu_smu_memory_pool_size; > extern int amdgpu_smu_pptable_id; > extern uint amdgpu_dc_feature_mask; > +extern uint amdgpu_freesync_vid_mode; > extern uint amdgpu_dc_debug_mask; > extern uint amdgpu_dc_visual_confirm; > extern int amdgpu_dm_abm_level; > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > index 15a8a64fc4e28..82b154b103f43 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c > @@ -199,6 +199,7 @@ int amdgpu_mes_kiq; > int amdgpu_noretry = -1; > int amdgpu_force_asic_type = -1; > int amdgpu_tmz = -1; /* auto */ > +uint amdgpu_freesync_vid_mode; > int amdgpu_reset_method = -1; /* auto */ > int amdgpu_num_kcq = -1; > int amdgpu_smartshift_bias; > @@ -883,6 +884,32 @@ module_param_named(damageclips, amdgpu_damage_clips, int, 0444); > MODULE_PARM_DESC(tmz, "Enable TMZ feature (-1 = auto (default), 0 = off, 1 = on)"); > module_param_named(tmz, amdgpu_tmz, int, 0444); > > +/** > + * DOC: freesync_video (uint) > + * Enable the optimization to adjust front porch timing to achieve seamless > + * mode change experience when setting a freesync supported mode for which full > + * modeset is not needed. > + * > + * The Display Core will add a set of modes derived from the base FreeSync > + * video mode into the corresponding connector's mode list based on commonly > + * used refresh rates and VRR range of the connected display, when users enable > + * this feature. From the userspace perspective, they can see a seamless mode > + * change experience when the change between different refresh rates under the > + * same resolution. Additionally, userspace applications such as Video playback > + * can read this modeset list and change the refresh rate based on the video > + * frame rate. Finally, the userspace can also derive an appropriate mode for a > + * particular refresh rate based on the FreeSync Mode and add it to the > + * connector's mode list. > + * > + * Note: This is an experimental feature. > + * > + * The default value: 0 (off). > + */ > +MODULE_PARM_DESC( > + freesync_video, > + "Enable freesync modesetting optimization feature (0 = off (default), 1 = on)"); > +module_param_named(freesync_video, amdgpu_freesync_vid_mode, uint, 0444); > + > /** > * DOC: reset_method (int) > * GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)