From: "Christian König" <ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: "StDenis, Tom" <Tom.StDenis-5C7GfCeVMHo@public.gmane.org>,
"amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
<amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
Subject: Re: [PATCH 1/2] drm/amd/amdgpu: Add VMID to SRBM debugfs bank selection
Date: Tue, 16 Jul 2019 11:18:52 +0200 [thread overview]
Message-ID: <90fce795-4af2-d969-23e5-85a71b87f9cb@gmail.com> (raw)
In-Reply-To: <20190712134406.30374-1-tom.stdenis-5C7GfCeVMHo@public.gmane.org>
Am 12.07.19 um 15:44 schrieb StDenis, Tom:
> Add 5 bits to the offset for SRBM selection to handle VMIDs. Also
> update the select_me_pipe_q() callback to also select VMID.
Maybe split in two patches? Either way Reviewed-by: Christian König
<christian.koenig@amd.com>.
>
> Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 9 +++++----
> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 4 ++--
> drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
> 6 files changed, 14 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> index 4997efa09ce7..87b32873046f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> @@ -103,10 +103,10 @@ static int amdgpu_debugfs_process_reg_op(bool read, struct file *f,
> ssize_t result = 0;
> int r;
> bool pm_pg_lock, use_bank, use_ring;
> - unsigned instance_bank, sh_bank, se_bank, me, pipe, queue;
> + unsigned instance_bank, sh_bank, se_bank, me, pipe, queue, vmid;
>
> pm_pg_lock = use_bank = use_ring = false;
> - instance_bank = sh_bank = se_bank = me = pipe = queue = 0;
> + instance_bank = sh_bank = se_bank = me = pipe = queue = vmid = 0;
>
> if (size & 0x3 || *pos & 0x3 ||
> ((*pos & (1ULL << 62)) && (*pos & (1ULL << 61))))
> @@ -132,6 +132,7 @@ static int amdgpu_debugfs_process_reg_op(bool read, struct file *f,
> me = (*pos & GENMASK_ULL(33, 24)) >> 24;
> pipe = (*pos & GENMASK_ULL(43, 34)) >> 34;
> queue = (*pos & GENMASK_ULL(53, 44)) >> 44;
> + vmid = (*pos & GENMASK_ULL(48, 45)) >> 54;
>
> use_ring = 1;
> } else {
> @@ -149,7 +150,7 @@ static int amdgpu_debugfs_process_reg_op(bool read, struct file *f,
> sh_bank, instance_bank);
> } else if (use_ring) {
> mutex_lock(&adev->srbm_mutex);
> - amdgpu_gfx_select_me_pipe_q(adev, me, pipe, queue);
> + amdgpu_gfx_select_me_pipe_q(adev, me, pipe, queue, vmid);
> }
>
> if (pm_pg_lock)
> @@ -182,7 +183,7 @@ static int amdgpu_debugfs_process_reg_op(bool read, struct file *f,
> amdgpu_gfx_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
> mutex_unlock(&adev->grbm_idx_mutex);
> } else if (use_ring) {
> - amdgpu_gfx_select_me_pipe_q(adev, 0, 0, 0);
> + amdgpu_gfx_select_me_pipe_q(adev, 0, 0, 0, 0);
> mutex_unlock(&adev->srbm_mutex);
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> index f96407ba9770..1199b5828b90 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> @@ -195,7 +195,7 @@ struct amdgpu_gfx_funcs {
> uint32_t wave, uint32_t start, uint32_t size,
> uint32_t *dst);
> void (*select_me_pipe_q)(struct amdgpu_device *adev, u32 me, u32 pipe,
> - u32 queue);
> + u32 queue, u32 vmid);
> };
>
> struct amdgpu_ngg_buf {
> @@ -327,7 +327,7 @@ struct amdgpu_gfx {
>
> #define amdgpu_gfx_get_gpu_clock_counter(adev) (adev)->gfx.funcs->get_gpu_clock_counter((adev))
> #define amdgpu_gfx_select_se_sh(adev, se, sh, instance) (adev)->gfx.funcs->select_se_sh((adev), (se), (sh), (instance))
> -#define amdgpu_gfx_select_me_pipe_q(adev, me, pipe, q) (adev)->gfx.funcs->select_me_pipe_q((adev), (me), (pipe), (q))
> +#define amdgpu_gfx_select_me_pipe_q(adev, me, pipe, q, vmid) (adev)->gfx.funcs->select_me_pipe_q((adev), (me), (pipe), (q), (vmid))
>
> /**
> * amdgpu_gfx_create_bitmask - create a bitmask
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> index 0745370493f3..8c27c305e692 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> @@ -3041,7 +3041,7 @@ static void gfx_v6_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,
> }
>
> static void gfx_v6_0_select_me_pipe_q(struct amdgpu_device *adev,
> - u32 me, u32 pipe, u32 q)
> + u32 me, u32 pipe, u32 q, u32 vm)
> {
> DRM_INFO("Not implemented\n");
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> index bc5ff82565d2..e1e2a44ee13c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> @@ -4167,9 +4167,9 @@ static void gfx_v7_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,
> }
>
> static void gfx_v7_0_select_me_pipe_q(struct amdgpu_device *adev,
> - u32 me, u32 pipe, u32 q)
> + u32 me, u32 pipe, u32 q, u32 vm)
> {
> - cik_srbm_select(adev, me, pipe, q, 0);
> + cik_srbm_select(adev, me, pipe, q, vm);
> }
>
> static const struct amdgpu_gfx_funcs gfx_v7_0_gfx_funcs = {
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 13432a9210a3..8c590a554675 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -3432,9 +3432,9 @@ static void gfx_v8_0_select_se_sh(struct amdgpu_device *adev,
> }
>
> static void gfx_v8_0_select_me_pipe_q(struct amdgpu_device *adev,
> - u32 me, u32 pipe, u32 q)
> + u32 me, u32 pipe, u32 q, u32 vm)
> {
> - vi_srbm_select(adev, me, pipe, q, 0);
> + vi_srbm_select(adev, me, pipe, q, vm);
> }
>
> static u32 gfx_v8_0_get_rb_active_bitmap(struct amdgpu_device *adev)
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index ed48def12db1..d20d55199a1c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1309,9 +1309,9 @@ static void gfx_v9_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t simd,
> }
>
> static void gfx_v9_0_select_me_pipe_q(struct amdgpu_device *adev,
> - u32 me, u32 pipe, u32 q)
> + u32 me, u32 pipe, u32 q, u32 vm)
> {
> - soc15_grbm_select(adev, me, pipe, q, 0);
> + soc15_grbm_select(adev, me, pipe, q, vm);
> }
>
> static const struct amdgpu_gfx_funcs gfx_v9_0_gfx_funcs = {
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prev parent reply other threads:[~2019-07-16 9:18 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-12 13:44 [PATCH 1/2] drm/amd/amdgpu: Add VMID to SRBM debugfs bank selection StDenis, Tom
[not found] ` <20190712134406.30374-1-tom.stdenis-5C7GfCeVMHo@public.gmane.org>
2019-07-12 13:44 ` [PATCH 2/2] drm/amd/amdgpu: Add missing select_me_pipe_q() for gfx10 StDenis, Tom
[not found] ` <20190712134406.30374-2-tom.stdenis-5C7GfCeVMHo@public.gmane.org>
2019-07-12 18:37 ` Alex Deucher
2019-07-16 9:20 ` Christian König
2019-07-16 9:18 ` Christian König [this message]
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