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From: Shashank Sharma <shashank.sharma@amd.com>
To: "Felix Kuehling" <felix.kuehling@amd.com>,
	"Christian König" <christian.koenig@amd.com>,
	amd-gfx@lists.freedesktop.org
Cc: Alex Deucher <alexander.deucher@amd.com>, arvind.yadav@amd.com
Subject: Re: [PATCH v5 04/10] drm/amdgpu: create GFX-gen11 usermode queue
Date: Wed, 12 Jul 2023 17:55:13 +0200	[thread overview]
Message-ID: <9cac0523-8596-c64b-93be-9d3425ca3c25@amd.com> (raw)
In-Reply-To: <435820e9-1680-3687-4930-bf7ea5967568@amd.com>


On 11/07/2023 21:51, Felix Kuehling wrote:
>
> On 2023-07-06 09:39, Christian König wrote:
>> Am 06.07.23 um 15:37 schrieb Shashank Sharma:
>>>
>>> On 06/07/2023 15:22, Christian König wrote:
>>>> Am 06.07.23 um 14:35 schrieb Shashank Sharma:
>>>>> A Memory queue descriptor (MQD) of a userqueue defines it in
>>>>> the hw's context. As MQD format can vary between different
>>>>> graphics IPs, we need gfx GEN specific handlers to create MQDs.
>>>>>
>>>>> This patch:
>>>>> - Introduces MQD handler functions for the usermode queues.
>>>>> - Adds new functions to create and destroy userqueue MQD for
>>>>>    GFX-GEN-11 IP
>>>>>
>>>>> V1: Worked on review comments from Alex:
>>>>>      - Make MQD functions GEN and IP specific
>>>>>
>>>>> V2: Worked on review comments from Alex:
>>>>>      - Reuse the existing adev->mqd[ip] for MQD creation
>>>>>      - Formatting and arrangement of code
>>>>>
>>>>> V3:
>>>>>      - Integration with doorbell manager
>>>>>
>>>>> V4: Review comments addressed:
>>>>>      - Do not create a new file for userq, reuse gfx_v11_0.c (Alex)
>>>>>      - Align name of structure members (Luben)
>>>>>      - Don't break up the Cc tag list and the Sob tag list in commit
>>>>>        message (Luben)
>>>>> V5:
>>>>>     - No need to reserve the bo for MQD (Christian).
>>>>>     - Some more changes to support IP specific MQD creation.
>>>>>
>>>>> Cc: Alex Deucher <alexander.deucher@amd.com>
>>>>> Cc: Christian Koenig <christian.koenig@amd.com>
>>>>> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
>>>>> Signed-off-by: Arvind Yadav <arvind.yadav@amd.com>
>>>>> ---
>>>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 16 ++++
>>>>>   drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c        | 73 
>>>>> +++++++++++++++++++
>>>>>   .../gpu/drm/amd/include/amdgpu_userqueue.h    |  7 ++
>>>>>   3 files changed, 96 insertions(+)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c 
>>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
>>>>> index e37b5da5a0d0..bb774144c372 100644
>>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
>>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
>>>>> @@ -134,12 +134,28 @@ int amdgpu_userq_ioctl(struct drm_device 
>>>>> *dev, void *data,
>>>>>       return r;
>>>>>   }
>>>>>   +extern const struct amdgpu_userq_funcs userq_gfx_v11_funcs;
>>>>> +
>>>>> +static void
>>>>> +amdgpu_userqueue_setup_gfx(struct amdgpu_userq_mgr *uq_mgr)
>>>>> +{
>>>>> +    int maj;
>>>>> +    struct amdgpu_device *adev = uq_mgr->adev;
>>>>> +    uint32_t version = adev->ip_versions[GC_HWIP][0];
>>>>> +
>>>>> +    /* We support usermode queue only for GFX V11 as of now */
>>>>> +    maj = IP_VERSION_MAJ(version);
>>>>> +    if (maj == 11)
>>>>> +        uq_mgr->userq_funcs[AMDGPU_HW_IP_GFX] = 
>>>>> &userq_gfx_v11_funcs;
>>>>> +}
>>>>> +
>>>>>   int amdgpu_userq_mgr_init(struct amdgpu_userq_mgr *userq_mgr, 
>>>>> struct amdgpu_device *adev)
>>>>>   {
>>>>>       mutex_init(&userq_mgr->userq_mutex);
>>>>>       idr_init_base(&userq_mgr->userq_idr, 1);
>>>>>       userq_mgr->adev = adev;
>>>>>   +    amdgpu_userqueue_setup_gfx(userq_mgr);
>>>>>       return 0;
>>>>>   }
>>>>>   diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c 
>>>>> b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
>>>>> index c4940b6ea1c4..e76e1b86b434 100644
>>>>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
>>>>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
>>>>> @@ -30,6 +30,7 @@
>>>>>   #include "amdgpu_psp.h"
>>>>>   #include "amdgpu_smu.h"
>>>>>   #include "amdgpu_atomfirmware.h"
>>>>> +#include "amdgpu_userqueue.h"
>>>>>   #include "imu_v11_0.h"
>>>>>   #include "soc21.h"
>>>>>   #include "nvd.h"
>>>>> @@ -6486,3 +6487,75 @@ const struct amdgpu_ip_block_version 
>>>>> gfx_v11_0_ip_block =
>>>>>       .rev = 0,
>>>>>       .funcs = &gfx_v11_0_ip_funcs,
>>>>>   };
>>>>> +
>>>>> +static int gfx_v11_0_userq_mqd_create(struct amdgpu_userq_mgr 
>>>>> *uq_mgr,
>>>>> +                      struct drm_amdgpu_userq_in *args_in,
>>>>> +                      struct amdgpu_usermode_queue *queue)
>>>>> +{
>>>>> +    struct amdgpu_device *adev = uq_mgr->adev;
>>>>> +    struct amdgpu_mqd *mqd_gfx_generic = 
>>>>> &adev->mqds[AMDGPU_HW_IP_GFX];
>>>>> +    struct drm_amdgpu_userq_mqd_gfx_v11_0 mqd_user;
>>>>> +    struct amdgpu_mqd_prop userq_props;
>>>>> +    int r;
>>>>> +
>>>>> +    /* Incoming MQD parameters from userspace to be saved here */
>>>>> +    memset(&mqd_user, 0, sizeof(mqd_user));
>>>>> +
>>>>> +    /* Structure to initialize MQD for userqueue using generic 
>>>>> MQD init function */
>>>>> +    memset(&userq_props, 0, sizeof(userq_props));
>>>>> +
>>>>> +    if (args_in->mqd_size != sizeof(struct 
>>>>> drm_amdgpu_userq_mqd_gfx_v11_0)) {
>>>>> +        DRM_ERROR("MQD size mismatch\n");
>>>>> +        return -EINVAL;
>>>>> +    }
>>>>> +
>>>>> +    if (copy_from_user(&mqd_user, u64_to_user_ptr(args_in->mqd), 
>>>>> args_in->mqd_size)) {
>>>>> +        DRM_ERROR("Failed to get user MQD\n");
>>>>> +        return -EFAULT;
>>>>> +    }
>>>>> +
>>>>> +    /* Create BO for actual Userqueue MQD now */
>>>>> +    r = amdgpu_bo_create_kernel(adev, mqd_gfx_generic->mqd_size, 
>>>>> PAGE_SIZE,
>>>>> +                    AMDGPU_GEM_DOMAIN_GTT,
>>>>> +                    &queue->mqd.obj,
>>>>> +                    &queue->mqd.gpu_addr,
>>>>> +                    &queue->mqd.cpu_ptr);
>>>>> +    if (r) {
>>>>> +        DRM_ERROR("Failed to allocate BO for userqueue (%d)", r);
>>>>> +        return -ENOMEM;
>>>>> +    }
>>>>
>>>> Using amdgpu_bo_create_kernel() for the MQD is most likely not a 
>>>> good idea in the long term, but should work for now.
>>>>
>>> I was a bit curious about this, the scope of this MQD object is 
>>> kernel internal and used for queue mapping only, userspace doesn't 
>>> know much about it. Do you still think we should not create a kernel 
>>> object for it ?
>>
>>
>> Well we should use a kernel BO. But amdgpu_bo_create_kernel() not 
>> only creates a kernel BO but also pins it! And that is problematic 
>> because it allows userspace to do a deny of service attach on the 
>> kernel module.
>>
>> What we need is an eviction fence, e.g. what KFD is already using. 
>> Then the BO is created similar to how VM page tables are created, 
>> maybe even using the same reservation object.
>
> KFD doesn't currently use eviction fences on MQDs. Those are pinned. I 
> guess you could treat the MQDs more like we treat page tables. They 
> are allocated in kernel mode but protected with fences rather than 
> pinning.
>
> I'm not sure if MES needs to be able to access MQDs while queues are 
> not mapped. If that's the case, pinning can't be avoided.
>
I was planning to do something like this keep userqueue objects from 
eviction:

- Add a new mutex in queue struct (say userq_eviction_fence)

- lock this while mapping the queue, and unlock it while unmapping of 
the queue

- add checks in amdgpu_vm_evictable() to add a 
mutex_trylock(userq_eviction_fence)

Does it sound like what we want to do here or should I need something else ?

> Regards,
>   Felix
>
>
>>
>> But for a test this here is probably ok.
>>
>> Christian.
>>
>>>
>>> - Shashank
>>>
>>>> Probably best to add a comment here that this needs to be improved.
>>>>
>>>> Apart from that looks good to me,
>>>> Christian.
>>>>
>>>>> +    memset(queue->mqd.cpu_ptr, 0, mqd_gfx_generic->mqd_size);
>>>>> +
>>>>> +    /* Initialize the MQD BO with user given values */
>>>>> +    userq_props.wptr_gpu_addr = mqd_user.wptr_va;
>>>>> +    userq_props.rptr_gpu_addr = mqd_user.rptr_va;
>>>>> +    userq_props.queue_size = mqd_user.queue_size;
>>>>> +    userq_props.hqd_base_gpu_addr = mqd_user.queue_va;
>>>>> +    userq_props.mqd_gpu_addr = queue->mqd.gpu_addr;
>>>>> +    userq_props.use_doorbell = true;
>>>>> +
>>>>> +    r = mqd_gfx_generic->init_mqd(adev, (void 
>>>>> *)queue->mqd.cpu_ptr, &userq_props);
>>>>> +    if (r) {
>>>>> +        DRM_ERROR("Failed to initialize MQD for userqueue\n");
>>>>> +        goto free_mqd;
>>>>> +    }
>>>>> +
>>>>> +    return 0;
>>>>> +
>>>>> +free_mqd:
>>>>> +    amdgpu_bo_free_kernel(&queue->mqd.obj, &queue->mqd.gpu_addr, 
>>>>> &queue->mqd.cpu_ptr);
>>>>> +    return r;
>>>>> +}
>>>>> +
>>>>> +static void
>>>>> +gfx_v11_0_userq_mqd_destroy(struct amdgpu_userq_mgr *uq_mgr, 
>>>>> struct amdgpu_usermode_queue *queue)
>>>>> +{
>>>>> +    struct amdgpu_userq_obj *mqd = &queue->mqd;
>>>>> +
>>>>> +    amdgpu_bo_free_kernel(&mqd->obj, &mqd->gpu_addr, &mqd->cpu_ptr);
>>>>> +}
>>>>> +
>>>>> +const struct amdgpu_userq_funcs userq_gfx_v11_funcs = {
>>>>> +    .mqd_create = gfx_v11_0_userq_mqd_create,
>>>>> +    .mqd_destroy = gfx_v11_0_userq_mqd_destroy,
>>>>> +};
>>>>> diff --git a/drivers/gpu/drm/amd/include/amdgpu_userqueue.h 
>>>>> b/drivers/gpu/drm/amd/include/amdgpu_userqueue.h
>>>>> index 55ed6512a565..240f92796f00 100644
>>>>> --- a/drivers/gpu/drm/amd/include/amdgpu_userqueue.h
>>>>> +++ b/drivers/gpu/drm/amd/include/amdgpu_userqueue.h
>>>>> @@ -29,6 +29,12 @@
>>>>>     struct amdgpu_mqd_prop;
>>>>>   +struct amdgpu_userq_obj {
>>>>> +    void         *cpu_ptr;
>>>>> +    uint64_t     gpu_addr;
>>>>> +    struct amdgpu_bo *obj;
>>>>> +};
>>>>> +
>>>>>   struct amdgpu_usermode_queue {
>>>>>       int            queue_type;
>>>>>       uint64_t        doorbell_handle;
>>>>> @@ -37,6 +43,7 @@ struct amdgpu_usermode_queue {
>>>>>       struct amdgpu_mqd_prop    *userq_prop;
>>>>>       struct amdgpu_userq_mgr *userq_mgr;
>>>>>       struct amdgpu_vm    *vm;
>>>>> +    struct amdgpu_userq_obj mqd;
>>>>>   };
>>>>>     struct amdgpu_userq_funcs {
>>>>
>>

  reply	other threads:[~2023-07-12 15:55 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-06 12:35 [PATCH v5 00/10] AMDGPU Usermode queues Shashank Sharma
2023-07-06 12:35 ` [PATCH v5 01/10] drm/amdgpu: UAPI for user queue management Shashank Sharma
2023-07-06 12:35 ` [PATCH v5 02/10] drm/amdgpu: add usermode queue base code Shashank Sharma
2023-07-06 12:46   ` Christian König
2023-07-06 16:36   ` Alex Deucher
2023-07-06 16:52     ` Shashank Sharma
2023-07-06 17:34       ` Alex Deucher
2023-07-06 12:35 ` [PATCH v5 03/10] drm/amdgpu: add new IOCTL for usermode queue Shashank Sharma
2023-07-06 13:20   ` Christian König
2023-07-06 12:35 ` [PATCH v5 04/10] drm/amdgpu: create GFX-gen11 " Shashank Sharma
2023-07-06 13:22   ` Christian König
2023-07-06 13:37     ` Shashank Sharma
2023-07-06 13:39       ` Christian König
2023-07-06 13:43         ` Shashank Sharma
2023-07-11 19:51         ` Felix Kuehling
2023-07-12 15:55           ` Shashank Sharma [this message]
2023-07-12 16:01             ` Felix Kuehling
2023-07-12 16:07               ` Shashank Sharma
2023-07-06 16:27   ` Alex Deucher
2023-07-06 16:29     ` Shashank Sharma
2023-07-07  7:24   ` Christian König
2023-07-07  7:46     ` Shashank Sharma
2023-07-07  8:37       ` Christian König
2023-07-07 10:02         ` Shashank Sharma
2023-07-07 12:28           ` Christian König
2023-07-07 12:46             ` Shashank Sharma
2023-07-06 12:35 ` [PATCH v5 05/10] drm/amdgpu: create context space for " Shashank Sharma
2023-07-06 13:28   ` Christian König
2023-07-06 13:33     ` Shashank Sharma
2023-07-06 13:37       ` Christian König
2023-07-06 16:44   ` Alex Deucher
2023-07-06 12:35 ` [PATCH v5 06/10] drm/amdgpu: map usermode queue into MES Shashank Sharma
2023-07-06 14:47   ` Christian König
2023-07-06 16:52   ` Alex Deucher
2023-07-06 17:15     ` Shashank Sharma
2023-07-06 17:26       ` Alex Deucher
2023-07-06 17:32         ` Shashank Sharma
2023-07-06 17:36           ` Alex Deucher
2023-07-06 12:35 ` [PATCH v5 07/10] drm/amdgpu: map wptr BO into GART Shashank Sharma
2023-07-06 12:36 ` [PATCH v5 08/10] drm/amdgpu: generate doorbell index for userqueue Shashank Sharma
2023-07-07  7:15   ` Christian König
2023-07-07  7:39     ` Shashank Sharma
2023-07-07  7:57       ` Christian König
2023-07-07  9:00         ` Shashank Sharma
2023-07-06 12:36 ` [PATCH v5 09/10] drm/amdgpu: cleanup leftover queues Shashank Sharma
2023-07-07  7:17   ` Christian König
2023-07-07  7:40     ` Shashank Sharma
2023-07-06 12:36 ` [PATCH v5 10/10] drm/amdgpu: add delay after userqueue mapping Shashank Sharma
2023-07-06 17:41   ` Alex Deucher
2023-07-06 18:30     ` Shashank Sharma

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