From: James Zhu <jamesz-5C7GfCeVMHo@public.gmane.org>
To: Alex Deucher <alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: "Zhou,
David(ChunMing)" <David1.Zhou-5C7GfCeVMHo@public.gmane.org>,
"amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
<amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>,
Timothy Pearson
<tpearson-z0qzliK6Om0mgXJStvpl+vpXobYPEAuW@public.gmane.org>,
"Deucher,
Alexander" <Alexander.Deucher-5C7GfCeVMHo@public.gmane.org>,
"Zhu, James" <James.Zhu-5C7GfCeVMHo@public.gmane.org>,
"Koenig,
Christian" <Christian.Koenig-5C7GfCeVMHo@public.gmane.org>
Subject: Re: [PATCH] Increase AMDGPU_MAX_UVD_INSTANCES to 3
Date: Mon, 25 Jun 2018 14:59:11 -0400 [thread overview]
Message-ID: <b0c2612a-ac0b-ca7a-be8d-1a3d1cadc938@amd.com> (raw)
In-Reply-To: <CADnq5_NVoR3zRRPWdQHTbRzZ7e0XYsjajDSx-jS_sa0-B3id1Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
[-- Attachment #1.1: Type: text/plain, Size: 3448 bytes --]
On 2018-06-25 02:53 PM, Alex Deucher wrote:
> On Mon, Jun 25, 2018 at 2:37 PM, James Zhu <jamesz-5C7GfCeVMHo@public.gmane.org> wrote:
>> For one UVD instance case,:
>>
>>
>> In function amdgpu_driver_load_kms, all ring->me should be set to zero.
>> adev = kzalloc(sizeof(struct amdgpu_device), GFP_KERNEL);
>>
>>
>> For two UVD instances cases:
>>
>> static void uvd_v7_0_set_ring_funcs(struct amdgpu_device *adev)
>> ..
>> for (i = 0; i < adev->uvd.num_uvd_inst; i++) {
>> adev->uvd.inst[i].ring.me = i;
>>
>> static void uvd_v7_0_set_enc_ring_funcs(struct amdgpu_device *adev)
>>
>> for (j = 0; j < adev->uvd.num_uvd_inst; j++) {
>> adev->uvd.inst[j].ring_enc[i].me = j;
>>
>> uvd_v4_2_early_init in uvd_v4_2.c adev->uvd.num_uvd_inst = 1;
>> uvd_v5_0_early_init in uvd_v5_0.c adev->uvd.num_uvd_inst = 1;
>> uvd_v6_0_early_init in uvd_v6_0.c adev->uvd.num_uvd_inst = 1;
>> uvd_v7_0_early_init in uvd_v7_0.c
>> if (adev->asic_type == CHIP_VEGA20)
>> adev->uvd.num_uvd_inst = UVD7_MAX_HW_INSTANCES_VEGA20;/*2*/
>> else
>> adev->uvd.num_uvd_inst = 1;
>>
>>
>> I didn't know when ring->me is set to 2. Maybe there is some leakage
>> somewhere.
>>
> What about older uvd (4.2, 5.0, 6.0) blocks?
I think the below code will reset
adev->uvd.inst[AMDGPU_MAX_UVD_INSTANCES].ring->me and
adev->uvd.inst[AMDGPU_MAX_UVD_INSTANCES].ring_enc[AMDGPU_MAX_UVD_ENC_RINGS]->me
to zero.
for older uvd IP UVD block.
/*adev = kzalloc(sizeof(struct amdgpu_device), GFP_KERNEL); */Do I
understand correctly? James/**/
>
> Alex
>
>> Best regards!
>>
>> James zhu
>>
>>
>> On 2018-06-25 01:29 PM, Deucher, Alexander wrote:
>>
>> Odd. The structure should be 0 initialized. Does this patch help?
>>
>>
>> Alex
>>
>> ________________________________
>> From: Timothy Pearson <tpearson-z0qzliK6Om0mgXJStvpl+vpXobYPEAuW@public.gmane.org>
>> Sent: Monday, June 25, 2018 11:53:12 AM
>> To: Zhu, James
>> Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; Deucher, Alexander; Zhou,
>> David(ChunMing); Koenig, Christian
>> Subject: Re: [PATCH] Increase AMDGPU_MAX_UVD_INSTANCES to 3
>>
>> n 06/25/2018 09:46 AM, James Zhu wrote:
>>>
>>> On 2018-06-23 08:02 PM, Timothy Pearson wrote:
>>>> amdgpu_fence_driver_start_ring() attempts to access
>>>> UVD instance 2 during setup, while the existing UVD
>>>> instance count only allows instances 0 and 1.
>>>>
>>>> Increase AMDGPU_MAX_UVD_INSTANCES by one to avoid the
>>>> invalid array access.
>>>>
>>>> Caught by UBSAN.
>>> Hi Timothy,
>>>
>>> From design of view, it is not right to just change
>>> AMDGPU_MAX_UVD_INSTANCES to 3.
>>>
>>> Could you tell me some detail of UBSAN test and attach the dmesg also?
>> Definitely, was looking for some feedback from anyone knowing more about
>> the internals of the UVD system.
>>
>> What's happening is that "ring->me" in amdgpu_fence_driver_start_ring()
>> (drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:379) is set to a value of
>> "2". The overall dmesg is otherwise uninteresting, but I can try to
>> grab the UBSAN output if needed.
>>
>> --
>> Timothy Pearson
>> Raptor Engineering
>> +1 (415) 727-8645 (direct line)
>> +1 (512) 690-0200 (switchboard)
>> https://www.raptorengineering.com
>>
>>
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>>
[-- Attachment #1.2: Type: text/html, Size: 4946 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
next prev parent reply other threads:[~2018-06-25 18:59 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-24 0:02 [PATCH] Increase AMDGPU_MAX_UVD_INSTANCES to 3 Timothy Pearson
[not found] ` <1050162536.2570273.1529798571780.JavaMail.zimbra-z0qzliK6Om0mgXJStvpl+u2xl0RS173n@public.gmane.org>
2018-06-25 14:46 ` James Zhu
[not found] ` <03467f4e-bcab-165c-028b-fea16441446a-5C7GfCeVMHo@public.gmane.org>
2018-06-25 15:53 ` Timothy Pearson
[not found] ` <5B310FE8.4060900-z0qzliK6Om0mgXJStvpl+vpXobYPEAuW@public.gmane.org>
2018-06-25 17:29 ` Deucher, Alexander
[not found] ` <BN6PR12MB1809E207A784F6EE6D79239AF74A0-/b2+HYfkarSEx6ez0IUAagdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-06-25 18:37 ` James Zhu
[not found] ` <2b12b893-e2a0-9362-cb8f-15b57b12fe11-5C7GfCeVMHo@public.gmane.org>
2018-06-25 18:53 ` Alex Deucher
[not found] ` <CADnq5_NVoR3zRRPWdQHTbRzZ7e0XYsjajDSx-jS_sa0-B3id1Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-06-25 18:59 ` James Zhu [this message]
[not found] ` <b0c2612a-ac0b-ca7a-be8d-1a3d1cadc938-5C7GfCeVMHo@public.gmane.org>
2018-06-25 19:02 ` Alex Deucher
[not found] ` <CADnq5_O3P68Er_oEf9YybKxFBXk4BFQnJ45wtiKCs9oSxJBcAg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-06-25 19:13 ` Leo Liu
2018-06-25 19:15 ` James Zhu
[not found] ` <f5941769-c342-6127-f932-414ab13414f8-5C7GfCeVMHo@public.gmane.org>
2018-06-25 19:35 ` Leo Liu
[not found] ` <691bc1b0-b3fb-6c48-081a-c9c9876a1b79-5C7GfCeVMHo@public.gmane.org>
2018-06-25 19:46 ` James Zhu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=b0c2612a-ac0b-ca7a-be8d-1a3d1cadc938@amd.com \
--to=jamesz-5c7gfcevmho@public.gmane.org \
--cc=Alexander.Deucher-5C7GfCeVMHo@public.gmane.org \
--cc=Christian.Koenig-5C7GfCeVMHo@public.gmane.org \
--cc=David1.Zhou-5C7GfCeVMHo@public.gmane.org \
--cc=James.Zhu-5C7GfCeVMHo@public.gmane.org \
--cc=alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
--cc=amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org \
--cc=tpearson-z0qzliK6Om0mgXJStvpl+vpXobYPEAuW@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox