AMD-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Christian König" <christian.koenig@amd.com>
To: Alex Sierra <alex.sierra@amd.com>, amd-gfx@lists.freedesktop.org
Cc: Felix.Kuehling@amd.com
Subject: Re: [PATCH] drm/amdgpu: enable 48-bit IH timestamp counter
Date: Tue, 10 Nov 2020 12:54:01 +0100	[thread overview]
Message-ID: <b2d58865-9ae8-cadc-959f-3746dbea1faf@amd.com> (raw)
In-Reply-To: <20201110032033.26249-1-alex.sierra@amd.com>

Am 10.11.20 um 04:20 schrieb Alex Sierra:
> By default this timestamp is based on a 32 bit counter.
> This is used by the amdgpu_gmc_filter_faults, to
> avoid process the same interrupt in retry configuration.
> Apparently there's a problem when the timestamp coming from
> IH overflows and compares against timestamp coming from the
> the hash table.
> This patch only extends the time overflow from 10 minutes to
> aprx 455 days.

Good catch, I wasn't aware of that limitation. The documentation from 
the IH suggested that it is a 64bit value.

> Signed-off-by: Alex Sierra <alex.sierra@amd.com>

In the long term we probably need some wrap around handling, but for now 
Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 6 ++++++
>   1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
> index 837769fcb35b..bda916f33805 100644
> --- a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
> +++ b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
> @@ -94,6 +94,8 @@ static void navi10_ih_enable_interrupts(struct amdgpu_device *adev)
>   
>   	ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1);
>   	ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 1);
> +	ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL,
> +				   RB_GPU_TS_ENABLE, 1);
>   	if (amdgpu_sriov_vf(adev) && adev->asic_type < CHIP_NAVI10) {
>   		if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL, ih_rb_cntl)) {
>   			DRM_ERROR("PSP program IH_RB_CNTL failed!\n");
> @@ -109,6 +111,8 @@ static void navi10_ih_enable_interrupts(struct amdgpu_device *adev)
>   		ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);
>   		ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL_RING1,
>   					   RB_ENABLE, 1);
> +		ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL_RING1,
> +					   RB_GPU_TS_ENABLE, 1);
>   		if (amdgpu_sriov_vf(adev) && adev->asic_type < CHIP_NAVI10) {
>   			if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL_RING1,
>   						ih_rb_cntl)) {
> @@ -125,6 +129,8 @@ static void navi10_ih_enable_interrupts(struct amdgpu_device *adev)
>   		ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2);
>   		ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL_RING2,
>   					   RB_ENABLE, 1);
> +		ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL_RING2,
> +					   RB_GPU_TS_ENABLE, 1);
>   		if (amdgpu_sriov_vf(adev) && adev->asic_type < CHIP_NAVI10) {
>   			if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL_RING2,
>   						ih_rb_cntl)) {

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

  reply	other threads:[~2020-11-10 11:54 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-10  3:20 [PATCH] drm/amdgpu: enable 48-bit IH timestamp counter Alex Sierra
2020-11-10 11:54 ` Christian König [this message]
2020-11-10 18:08 ` philip yang
  -- strict thread matches above, loose matches on Subject: below --
2020-11-10 17:55 Alex Sierra
2020-11-10 17:57 ` Sierra Guiza, Alejandro (Alex)
2020-11-16 11:31   ` Christian König
2020-11-13 17:11     ` Sierra Guiza, Alejandro (Alex)
2020-11-13 17:15     ` Felix Kuehling
2020-11-14  8:26       ` Christian König

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=b2d58865-9ae8-cadc-959f-3746dbea1faf@amd.com \
    --to=christian.koenig@amd.com \
    --cc=Felix.Kuehling@amd.com \
    --cc=alex.sierra@amd.com \
    --cc=amd-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox