Re: [PATCH 5/8] drm/amdgpu: Missing multi-XCC support in MES

[Amber Lin <Amber.Lin@amd.com>]

On 3/23/26 15:10, Alex Deucher wrote:
> On Fri, Mar 20, 2026 at 5:19 PM Amber Lin <Amber.Lin@amd.com> wrote:
>> In a multi-XCC GPU, pass the master XCC's ID to amdgpu_mes_suspend,
>> amdgpu_mes_resume, and detect_and_reset_hung_queues so the command will be
>> sent to the matching master MES when the compute partition mode is not
>> SPX.
>>
>> Signed-off-by: Amber Lin <Amber.Lin@amd.com>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c            |  7 +++++--
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h            |  9 +++++----
>>   drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c             |  2 +-
>>   drivers/gpu/drm/amd/amdgpu/mes_userqueue.c         |  2 +-
>>   drivers/gpu/drm/amd/amdgpu/mes_v12_1.c             | 14 +-------------
>>   .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c  |  4 ++--
>>   6 files changed, 15 insertions(+), 23 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
>> index 710bca87c32b..4f44b933e373 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
>> @@ -300,7 +300,7 @@ void amdgpu_mes_fini(struct amdgpu_device *adev)
>>          mutex_destroy(&adev->mes.mutex_hidden);
>>   }
>>
>> -int amdgpu_mes_suspend(struct amdgpu_device *adev)
>> +int amdgpu_mes_suspend(struct amdgpu_device *adev, uint32_t xcc_id)
>>   {
>>          struct mes_suspend_gang_input input;
>>          int r;
>> @@ -310,6 +310,7 @@ int amdgpu_mes_suspend(struct amdgpu_device *adev)
>>
>>          memset(&input, 0x0, sizeof(struct mes_suspend_gang_input));
>>          input.suspend_all_gangs = 1;
>> +       input.xcc_id = xcc_id;
>>
>>          /*
>>           * Avoid taking any other locks under MES lock to avoid circular
>> @@ -324,7 +325,7 @@ int amdgpu_mes_suspend(struct amdgpu_device *adev)
>>          return r;
>>   }
>>
>> -int amdgpu_mes_resume(struct amdgpu_device *adev)
>> +int amdgpu_mes_resume(struct amdgpu_device *adev, uint32_t xcc_id)
>>   {
>>          struct mes_resume_gang_input input;
>>          int r;
>> @@ -334,6 +335,7 @@ int amdgpu_mes_resume(struct amdgpu_device *adev)
>>
>>          memset(&input, 0x0, sizeof(struct mes_resume_gang_input));
>>          input.resume_all_gangs = 1;
>> +       input.xcc_id = xcc_id;
>>
>>          /*
>>           * Avoid taking any other locks under MES lock to avoid circular
>> @@ -462,6 +464,7 @@ int amdgpu_mes_detect_and_reset_hung_queues(struct amdgpu_device *adev,
>>                  adev->mes.hung_queue_db_array_size * sizeof(u32));
>>          input.queue_type = queue_type;
>>          input.detect_only = detect_only;
>> +       input.xcc_id = xcc_id;
>>
>>          r = adev->mes.funcs->detect_and_reset_hung_queues(&adev->mes,
>>                                                            &input);
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
>> index 2e6ae9f84db0..643b4f8d757a 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
>> @@ -325,8 +325,9 @@ struct mes_reset_queue_input {
>>   };
>>
>>   struct mes_detect_and_reset_queue_input {
>> -       uint32_t                           queue_type;
>> -       bool                               detect_only;
>> +       uint32_t        queue_type;
>> +       bool            detect_only;
>> +       uint32_t        xcc_id;
>>   };
>>
>>   struct mes_inv_tlbs_pasid_input {
>> @@ -442,8 +443,8 @@ int amdgpu_mes_init_microcode(struct amdgpu_device *adev, int pipe);
>>   int amdgpu_mes_init(struct amdgpu_device *adev);
>>   void amdgpu_mes_fini(struct amdgpu_device *adev);
>>
>> -int amdgpu_mes_suspend(struct amdgpu_device *adev);
>> -int amdgpu_mes_resume(struct amdgpu_device *adev);
>> +int amdgpu_mes_suspend(struct amdgpu_device *adev, uint32_t xcc_id);
>> +int amdgpu_mes_resume(struct amdgpu_device *adev, uint32_t xcc_id);
>>
>>   int amdgpu_mes_map_legacy_queue(struct amdgpu_device *adev,
>>                                  struct amdgpu_ring *ring, uint32_t xcc_id);
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
>> index 78d1f3eb522e..35734d34763a 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
>> @@ -5200,7 +5200,7 @@ static int gfx_v11_0_post_soft_reset(struct amdgpu_ip_block *ip_block)
>>          /**
>>           * GFX soft reset will impact MES, need resume MES when do GFX soft reset
>>           */
>> -       return amdgpu_mes_resume(adev);
>> +       return amdgpu_mes_resume(adev, 0);
>>   }
>>
>>   static uint64_t gfx_v11_0_get_gpu_clock_counter(struct amdgpu_device *adev)
>> diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
>> index 9508709abd49..d02a84711394 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
>> @@ -266,7 +266,7 @@ static int mes_userq_detect_and_reset(struct amdgpu_device *adev,
>>
>>          if (found_hung_queue) {
>>                  /* Resume scheduling after hang recovery */
>> -               r = amdgpu_mes_resume(adev);
>> +               r = amdgpu_mes_resume(adev, input.xcc_id);
>>          }
>>
>>          return r;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
>> index 70d80c2aed52..4b279259b9d3 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
>> @@ -1888,24 +1888,12 @@ static int mes_v12_1_hw_fini(struct amdgpu_ip_block *ip_block)
>>
>>   static int mes_v12_1_suspend(struct amdgpu_ip_block *ip_block)
>>   {
>> -       int r;
>> -
>> -       r = amdgpu_mes_suspend(ip_block->adev);
>> -       if (r)
>> -               return r;
>> -
>>          return mes_v12_1_hw_fini(ip_block);
>>   }
>>
>>   static int mes_v12_1_resume(struct amdgpu_ip_block *ip_block)
>>   {
>> -       int r;
>> -
>> -       r = mes_v12_1_hw_init(ip_block);
>> -       if (r)
>> -               return r;
>> -
>> -       return amdgpu_mes_resume(ip_block->adev);
>> +       return mes_v12_1_hw_init(ip_block);
> These changes seem unrelated.  Should these hunks be a separate patch?
>
> Alex
Yes I'll separate them into another patch
>>   }
>>
>>   static int mes_v12_1_early_init(struct amdgpu_ip_block *ip_block)
>> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
>> index 18bc5ba25f8f..ec8d7f4be840 100644
>> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
>> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
>> @@ -367,7 +367,7 @@ static int suspend_all_queues_mes(struct device_queue_manager *dqm)
>>          if (!down_read_trylock(&adev->reset_domain->sem))
>>                  return -EIO;
>>
>> -       r = amdgpu_mes_suspend(adev);
>> +       r = amdgpu_mes_suspend(adev, ffs(dqm->dev->xcc_mask) - 1);
>>          up_read(&adev->reset_domain->sem);
>>
>>          if (r) {
>> @@ -387,7 +387,7 @@ static int resume_all_queues_mes(struct device_queue_manager *dqm)
>>          if (!down_read_trylock(&adev->reset_domain->sem))
>>                  return -EIO;
>>
>> -       r = amdgpu_mes_resume(adev);
>> +       r = amdgpu_mes_resume(adev, ffs(dqm->dev->xcc_mask) - 1);
>>          up_read(&adev->reset_domain->sem);
>>
>>          if (r) {
>> --
>> 2.43.0
>>