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Tue, 6 Jan 2026 12:55:09 +0000 (GMT) Content-Type: multipart/alternative; boundary="------------086fTYrQ2rT2jh4SEIxPkD0F" Message-ID: Date: Tue, 6 Jan 2026 18:25:08 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v1 4/8] amdgpu/amdgpu_ttm: Fix AMDGPU_GTT_MAX_TRANSFER_SIZE for non-4K page size To: =?UTF-8?Q?Christian_K=C3=B6nig?= , amd-gfx@lists.freedesktop.org, Felix Kuehling , Alex Deucher , Philip Yang Cc: Kent.Russell@amd.com, Ritesh Harjani , Vaidyanathan Srinivasan , Mukesh Kumar Chaurasiya References: <465b106ddc1ff0d661f0f3db0eb9a9d092097825.1765519875.git.donettom@linux.ibm.com> <277c65ad-a3c3-4d99-a0f4-a6ca99e61ab4@amd.com> Content-Language: en-US From: Donet Tom In-Reply-To: <277c65ad-a3c3-4d99-a0f4-a6ca99e61ab4@amd.com> X-TM-AS-GCONF: 00 X-Authority-Analysis: v=2.4 cv=aaJsXBot c=1 sm=1 tr=0 ts=695d0633 cx=c_pps a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=r77TgQKjGQsHNAKrUKIA:9 a=VnNF1IyMAAAA:8 a=pGLkceISAAAA:8 a=i1_rtTS1CBzSE8fu5qYA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=zd2uoN0lAAAA:8 a=VakubJATnfHkqmAd:21 a=_W_S_7VecoQA:10 a=lqcHg5cX4UMA:10 X-Proofpoint-GUID: wZp0pDYes0fKimoC2wTWFfKpjt2j69q_ X-Proofpoint-ORIG-GUID: sssKpM45-Qq9fpa2Javi-B9j0M1gUsG0 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTA2MDEwNiBTYWx0ZWRfX87S3ahLOVJLH 5y1ozLCNLHWnTU6LaqHGD8vnWN72ZdjC3hov8UiKIQeEC7Kv0FiIWoShgs7xt+uh3cMUL3tqljc hrgN0vp9uTxWFI2pMDbjs5mfv5Tnk4fm1JwMjuKXABWiTFcrG7WCjdrIidfaXxGm0ew1Q/A4SlQ wRCX1Atw7EYF8j7f5PnTgkCsPlKWAATMaluWsQr432PpcpCa+++AlWRyo5WW9BMaBzB/rn/5/1K 3gfxDrIDjo7aBe0O9sMetbKc1Jp7jkzXFPaS1BKWqH0LlZlQYXkQo2DJbn4JITVRoL3307F8vUa XIdWb7I4PiimCfwYHb6aekXZYgbBM4LqhhZ0oZn6e5CcHZ8K57p+JhXTzl+IpcPswyunCvenTEU VOy7CE+eB0lbzI8GRCmZiwzSqPsq9/Tf4o21AFt/X+8UCookuV9SPI1YTphG2jWPf+GeiGRRuZy +CSeSXQ/gwiD2A6WTIw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-06_01,2026-01-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 priorityscore=1501 clxscore=1015 phishscore=0 spamscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2512120000 definitions=main-2601060106 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" This is a multi-part message in MIME format. --------------086fTYrQ2rT2jh4SEIxPkD0F Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 12/12/25 2:23 PM, Christian König wrote: > On 12/12/25 07:40, Donet Tom wrote: >> The SDMA engine has a hardware limitation of 4 MB maximum transfer >> size per operation. > That is not correct. This is only true on ancient HW. > > What problems are you seeing here? > >> AMDGPU_GTT_MAX_TRANSFER_SIZE was hardcoded to >> 512 pages, which worked correctly on systems with 4K pages but fails >> on systems with larger page sizes. >> >> This patch divides the max transfer size / AMDGPU_GPU_PAGES_IN_CPU_PAGE >> to match with non-4K page size systems. > That is actually a bad idea. The value was meant to match the PMD size. Hi Christian, Felix, Alex and philip Instead of hardcoding the AMDGPU_GTT_MAX_TRANSFER_SIZE value to 512, what do you think about doing something like the change below? This should work across all architectures and page sizes, so AMDGPU_GTT_MAX_TRANSFER_SIZE will always correspond to the PMD size on all architectures and with all page sizes. diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h index 0be2728aa872..c594ed7dff18 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -37,7 +37,7 @@  #define AMDGPU_PL_MMIO_REMAP   (TTM_PL_PRIV + 5)  #define __AMDGPU_PL_NUM        (TTM_PL_PRIV + 6) -#define AMDGPU_GTT_MAX_TRANSFER_SIZE   512 +#define AMDGPU_GTT_MAX_TRANSFER_SIZE   1 << (PMD_SHIFT - PAGE_SHIFT)  #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS Could you please provide your thoughts on above? Is it looking ok to you? If this looks good - here is what we were thinking: Patches 1-4 are required to fix initial non-4k pagesize support to AMD GPU. And since these patches are looking in good shape (since Philip has already reviewed [1-3])- We thought it will be good to split the patch series into two. I will send a v2 of Part-1 with patches [1-4] (will also address the review comments in v2 for Patch-1 & 2 from Philip) and for the rest of the patches [5-8] Part-2, we can continue the discussion till other things are sorted. That will also allow us to get these initial fixes in Part-1 ready before the 6.20 merge window. Thoughts? > > Regards, > Christian. > >> Signed-off-by: Donet Tom >> Signed-off-by: Ritesh Harjani (IBM) >> --- >> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h >> index 0be2728aa872..9d038feb25b0 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h >> @@ -37,7 +37,7 @@ >> #define AMDGPU_PL_MMIO_REMAP (TTM_PL_PRIV + 5) >> #define __AMDGPU_PL_NUM (TTM_PL_PRIV + 6) >> >> -#define AMDGPU_GTT_MAX_TRANSFER_SIZE 512 >> +#define AMDGPU_GTT_MAX_TRANSFER_SIZE (512 / AMDGPU_GPU_PAGES_IN_CPU_PAGE) >> #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2 >> >> extern const struct attribute_group amdgpu_vram_mgr_attr_group; --------------086fTYrQ2rT2jh4SEIxPkD0F Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 8bit


On 12/12/25 2:23 PM, Christian König wrote:
On 12/12/25 07:40, Donet Tom wrote:

The SDMA engine has a hardware limitation of 4 MB maximum transfer
size per operation.

That is not correct. This is only true on ancient HW.

What problems are you seeing here?


AMDGPU_GTT_MAX_TRANSFER_SIZE was hardcoded to
512 pages, which worked correctly on systems with 4K pages but fails
on systems with larger page sizes.

This patch divides the max transfer size / AMDGPU_GPU_PAGES_IN_CPU_PAGE
to match with non-4K page size systems.

That is actually a bad idea. The value was meant to match the PMD size.


Hi Christian, Felix, Alex and philip

Instead of hardcoding the AMDGPU_GTT_MAX_TRANSFER_SIZE value to 512,
what do you think about doing something like the change below?
This should work across all architectures and page sizes, so
AMDGPU_GTT_MAX_TRANSFER_SIZE will always correspond to the PMD
size on all architectures and with all page sizes.


diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 0be2728aa872..c594ed7dff18 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -37,7 +37,7 @@
 #define AMDGPU_PL_MMIO_REMAP   (TTM_PL_PRIV + 5)
 #define __AMDGPU_PL_NUM        (TTM_PL_PRIV + 6)
 
-#define AMDGPU_GTT_MAX_TRANSFER_SIZE   512
+#define AMDGPU_GTT_MAX_TRANSFER_SIZE   1 << (PMD_SHIFT - PAGE_SHIFT)
 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS  

Could you please provide your thoughts on above? Is it looking ok to you?

If this looks good - here is what we were thinking:

Patches 1-4 are required to fix initial non-4k pagesize support to AMD GPU.
And since these patches are looking in good shape (since Philip has already
reviewed [1-3])- We thought it will be good to split the patch series into two.
I will send a v2 of Part-1 with patches [1-4] (will also address the review comments
in v2 for Patch-1 & 2 from Philip) and for the rest of the patches [5-8] Part-2, we
can continue the discussion till other things are sorted. That will also allow us to
get these initial fixes in Part-1 ready before the 6.20 merge window. 

Thoughts?



Regards,
Christian.


Signed-off-by: Donet Tom <donettom@linux.ibm.com>
Signed-off-by: Ritesh Harjani (IBM) <ritesh.list@gmail.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 0be2728aa872..9d038feb25b0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -37,7 +37,7 @@
 #define AMDGPU_PL_MMIO_REMAP	(TTM_PL_PRIV + 5)
 #define __AMDGPU_PL_NUM	(TTM_PL_PRIV + 6)
 
-#define AMDGPU_GTT_MAX_TRANSFER_SIZE	512
+#define AMDGPU_GTT_MAX_TRANSFER_SIZE	(512 / AMDGPU_GPU_PAGES_IN_CPU_PAGE)
 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS	2
 
 extern const struct attribute_group amdgpu_vram_mgr_attr_group;


    

  


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