From: "Lazar, Lijo" <lijo.lazar@amd.com>
To: Kevin Wang <kevin1.wang@amd.com>, amd-gfx@lists.freedesktop.org
Cc: kenneth.feng@amd.com, frank.min@amd.com, hawking.zhang@amd.com
Subject: Re: [PATCH 2/5] drm/amd/pm: skip to load smu microcode on sriov for aldebaran
Date: Wed, 11 Aug 2021 15:12:43 +0530 [thread overview]
Message-ID: <c45b4f5c-b24d-649d-f5d2-e6c3c9544c65@amd.com> (raw)
In-Reply-To: <20210811083323.1084225-2-kevin1.wang@amd.com>
On 8/11/2021 2:03 PM, Kevin Wang wrote:
> 1. skip to load smu firmware in sriov mode for aldebaran chip
> 2. using vbios pptable if in sriov mode.
>
> Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
> ---
> .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 66 ++++++++++---------
> 1 file changed, 36 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> index a421ba85bd6d..a0ca7e7a0903 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
> @@ -85,6 +85,10 @@ int smu_v13_0_init_microcode(struct smu_context *smu)
> const struct common_firmware_header *header;
> struct amdgpu_firmware_info *ucode = NULL;
>
> + /* doesn't need to load smu firmware in IOV mode */
> + if (amdgpu_sriov_vf(adev))
> + return 0;
> +
> switch (adev->asic_type) {
> case CHIP_ALDEBARAN:
> chip_name = "aldebaran";
> @@ -279,41 +283,43 @@ int smu_v13_0_setup_pptable(struct smu_context *smu)
> void *table;
> uint16_t version_major, version_minor;
>
> + if (!amdgpu_sriov_vf(adev)) {
> + if (amdgpu_smu_pptable_id >= 0) {
> + smu->smu_table.boot_values.pp_table_id = amdgpu_smu_pptable_id;
> + dev_info(adev->dev, "override pptable id %d\n", amdgpu_smu_pptable_id);
> + }
Easier to read without goto if we keep like
if (amdgpu_sriov_vf(dev))
pptable_id = 0 ; // Force load from VBIOS
else
pptable_id = smu->smu_table.boot_values.pp_table_id;
Thanks,
Lijo
> - if (amdgpu_smu_pptable_id >= 0) {
> - smu->smu_table.boot_values.pp_table_id = amdgpu_smu_pptable_id;
> - dev_info(adev->dev, "override pptable id %d\n", amdgpu_smu_pptable_id);
> - }
> -
> - hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data;
> - version_major = le16_to_cpu(hdr->header.header_version_major);
> - version_minor = le16_to_cpu(hdr->header.header_version_minor);
> - if (version_major == 2 && smu->smu_table.boot_values.pp_table_id > 0) {
> - dev_info(adev->dev, "use driver provided pptable %d\n", smu->smu_table.boot_values.pp_table_id);
> - switch (version_minor) {
> - case 1:
> - ret = smu_v13_0_set_pptable_v2_1(smu, &table, &size,
> - smu->smu_table.boot_values.pp_table_id);
> - break;
> - default:
> - ret = -EINVAL;
> - break;
> + hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data;
> + version_major = le16_to_cpu(hdr->header.header_version_major);
> + version_minor = le16_to_cpu(hdr->header.header_version_minor);
> + if (version_major == 2 && smu->smu_table.boot_values.pp_table_id > 0) {
> + dev_info(adev->dev, "use driver provided pptable %d\n", smu->smu_table.boot_values.pp_table_id);
> + switch (version_minor) {
> + case 1:
> + ret = smu_v13_0_set_pptable_v2_1(smu, &table, &size,
> + smu->smu_table.boot_values.pp_table_id);
> + break;
> + default:
> + ret = -EINVAL;
> + break;
> + }
> + if (ret)
> + return ret;
> + goto out;
> }
> - if (ret)
> - return ret;
> + }
>
> - } else {
> - dev_info(adev->dev, "use vbios provided pptable\n");
> - index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
> - powerplayinfo);
> + dev_info(adev->dev, "use vbios provided pptable\n");
> + index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
> + powerplayinfo);
>
> - ret = amdgpu_atombios_get_data_table(adev, index, &atom_table_size, &frev, &crev,
> - (uint8_t **)&table);
> - if (ret)
> - return ret;
> - size = atom_table_size;
> - }
> + ret = amdgpu_atombios_get_data_table(adev, index, &atom_table_size, &frev, &crev,
> + (uint8_t **)&table);
> + if (ret)
> + return ret;
>
> + size = atom_table_size;
> +out:
> if (!smu->smu_table.power_play_table)
> smu->smu_table.power_play_table = table;
> if (!smu->smu_table.power_play_table_size)
>
next prev parent reply other threads:[~2021-08-11 9:43 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-11 8:33 [PATCH 1/5] drm/amd/pm: correct DPM_XGMI/VCN_DPM feature name Kevin Wang
2021-08-11 8:33 ` [PATCH 2/5] drm/amd/pm: skip to load smu microcode on sriov for aldebaran Kevin Wang
2021-08-11 9:42 ` Lazar, Lijo [this message]
2021-08-11 8:33 ` [PATCH 3/5] drm/amd/pm: change smu msg's attribute to allow working under sriov Kevin Wang
2021-08-11 9:47 ` Lazar, Lijo
2021-08-11 8:33 ` [PATCH 4/5] drm/amd/pm: change return value in aldebaran_get_power_limit() Kevin Wang
2021-08-11 9:45 ` Lazar, Lijo
2021-08-11 14:29 ` Wang, Kevin(Yang)
2021-08-11 8:33 ` [PATCH 5/5] drm/amd/pm: change pp_dpm_sclk/mclk/fclk attribute is RO for aldebaran Kevin Wang
2021-08-11 9:47 ` Lazar, Lijo
2021-08-11 9:46 ` [PATCH 1/5] drm/amd/pm: correct DPM_XGMI/VCN_DPM feature name Lazar, Lijo
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