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Fri, 25 Sep 2026 10:50:04 +0000 Message-ID: Date: Fri, 25 Sep 2026 16:19:57 +0530 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] drm/amdgpu: Derive RLC SPM xcc from GFXHUB To: Tvrtko Ursulin , amd-gfx@lists.freedesktop.org Cc: Hawking.Zhang@amd.com, Alexander.Deucher@amd.com, Christian.Koenig@amd.com, James.Zhu@amd.com, Bing.Ma@amd.com References: <20260925093718.2737342-1-lijo.lazar@amd.com> <5fdab172-c7b8-472e-8c6c-c6d5fd7afc70@ursulin.net> Content-Language: en-US From: "Lazar, Lijo" In-Reply-To: <5fdab172-c7b8-472e-8c6c-c6d5fd7afc70@ursulin.net> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: MA5P287CA0276.INDP287.PROD.OUTLOOK.COM (2603:1096:a01:1f2::19) To SA0PR12MB7091.namprd12.prod.outlook.com (2603:10b6:806:2d5::17) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA0PR12MB7091:EE_|DM4PR12MB6566:EE_ X-MS-Office365-Filtering-Correlation-Id: 13c4548e-5b05-442a-a573-08df1af2c181 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Only >> jobs on rings that use GFX subsystem need to be updated. Some rings like >> SDMA could be inside/outside of GFX subsytem based on SOC. Identify the >> rings using GFXHUB assignment and use hub id assigned to find the right >> GC rather than relying on xcc id. xcc id may not be necessarily assigned >> properly for all rings. > > I don't know the hardware well enough to review or be certain of what I > will ask, but if you remember the "kitten dies" meme it often comes to > my mind that "every time amdgpu repeatedly walks a list of everything to > find something at runtime a kitten dies". :) > > On a serious note, question I have following the statement from the > commit message that xcc id is not always correct for all rings is, would > it be feasible to make it correct? At ring init time I mean. And so > avoid having to repeatedly look for it. > Having to associate xcc_id with every ring (for ex: vcn/jpeg) is overloading it with too many things. This is one of the changes in another set to remove xcc_id and keep a dedicated ip_inst. Then realized that a sdma job also could trigger a spm vmid update, then using ring->ip_inst doesn't work (even now, xcc id for sdma ring is not assigned properly). That said, so far for gfxhub, xcc_id = ring->vmhub holds. The loop is only to appear it technically good. Also, max xcc = 8 (so far). Thanks, Lijo > Regards, > > Tvrtko > >> Signed-off-by: Lijo Lazar >> --- >>   drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c  |  2 +- >>   drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c | 31 +++++++++++++++++++++++++ >>   drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h |  2 ++ >>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  |  2 +- >>   4 files changed, 35 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/ >> amd/amdgpu/amdgpu_ib.c >> index 0f8b097001e3..6ea73ef6e672 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c >> @@ -212,7 +212,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, >> struct amdgpu_job *job, >>           amdgpu_ring_emit_pipeline_sync(ring); >>       if (emit_spm_needed) >> -        adev->gfx.rlc.funcs->update_spm_vmid(adev, ring->xcc_id, >> ring, job->vmid); >> +        amdgpu_gfx_rlc_update_spm(adev, ring, job->vmid); >>       if (emit_gds_needed) >>           amdgpu_ring_emit_gds_switch(ring, job->vmid, job->gds_base, >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c b/drivers/gpu/ >> drm/amd/amdgpu/amdgpu_rlc.c >> index 002fae3c380e..f791e1bcbf17 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c >> @@ -27,6 +27,37 @@ >>   #include "amdgpu_gfx.h" >>   #include "amdgpu_rlc.h" >> +/** >> + * amdgpu_gfx_rlc_update_spm - update RLC SPM VMID >> + * >> + * @adev: amdgpu_device pointer >> + * @ring: ring the VMID got assigned to >> + * @vmid: VMID to program >> + * >> + * RLC SPM counters are used only for GFX and GFX Cache subsystem. >> Only jobs submitted to >> + * rings in GFX subsystem need to update RLC SPM counters. Derive >> xcc_id from ring->vm_hub. >> + */ >> +void amdgpu_gfx_rlc_update_spm(struct amdgpu_device *adev, >> +                   struct amdgpu_ring *ring, unsigned int vmid) >> +{ >> +    int xcc_id, num_xcc; >> + >> +    if (!adev->gfx.rlc.funcs->update_spm_vmid || !ring) >> +        return; >> + >> +    if (!AMDGPU_IS_GFXHUB(ring->vm_hub)) >> +        return; >> + >> +    num_xcc = NUM_XCC(adev->gfx.xcc_mask); >> +    for (xcc_id = 0; xcc_id < num_xcc; xcc_id++) { >> +        if (AMDGPU_GFXHUB(xcc_id) == ring->vm_hub) { >> +            adev->gfx.rlc.funcs->update_spm_vmid(adev, xcc_id, ring, >> +                                 vmid); >> +            return; >> +        } >> +    } >> +} >> + >>   /** >>    * amdgpu_gfx_rlc_enter_safe_mode - Set RLC into safe mode >>    * >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h b/drivers/gpu/ >> drm/amd/amdgpu/amdgpu_rlc.h >> index 959d60c90dcd..1410954da5a6 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h >> @@ -370,6 +370,8 @@ struct amdgpu_rlc { >>       struct amdgpu_rlcg_reg_access_ctrl >> reg_access_ctrl[AMDGPU_MAX_RLC_INSTANCES]; >>   }; >> +void amdgpu_gfx_rlc_update_spm(struct amdgpu_device *adev, >> +                   struct amdgpu_ring *ring, unsigned int vmid); >>   void amdgpu_gfx_rlc_enter_safe_mode(struct amdgpu_device *adev, int >> xcc_id); >>   void amdgpu_gfx_rlc_exit_safe_mode(struct amdgpu_device *adev, int >> xcc_id); >>   int amdgpu_gfx_rlc_init_sr(struct amdgpu_device *adev, u32 dws); >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/ >> amd/amdgpu/amdgpu_vm.c >> index 29a66e39f3d6..dc8f85176b8b 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c >> @@ -865,7 +865,7 @@ void amdgpu_vm_flush(struct amdgpu_ring *ring, >> struct amdgpu_job *job, >>           amdgpu_gmc_emit_pasid_mapping(ring, job->vmid, job->pasid); >>       if (spm_update_needed) >> -        adev->gfx.rlc.funcs->update_spm_vmid(adev, ring->xcc_id, >> ring, job->vmid); >> +        amdgpu_gfx_rlc_update_spm(adev, ring, job->vmid); >>       if (gds_switch_needed) >>           amdgpu_ring_emit_gds_switch(ring, job->vmid, job->gds_base, >