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[165.204.72.6]) by smtp.gmail.com with ESMTPSA id d18-20020a05600c34d200b0041b083e16e2sm19141160wmq.2.2024.04.29.04.06.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 29 Apr 2024 04:06:15 -0700 (PDT) Message-ID: Date: Mon, 29 Apr 2024 13:06:14 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/3] drm/amdgpu: Fix pinned GART area accounting and fdinfo reporting To: Tvrtko Ursulin , amd-gfx@lists.freedesktop.org Cc: =?UTF-8?Q?Christian_K=C3=B6nig?= , kernel-dev@igalia.com, Tvrtko Ursulin , Felix Kuehling References: <20240426164355.1563-1-tursulin@igalia.com> <20240426164355.1563-4-tursulin@igalia.com> Content-Language: en-US From: =?UTF-8?Q?Christian_K=C3=B6nig?= In-Reply-To: <20240426164355.1563-4-tursulin@igalia.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Am 26.04.24 um 18:43 schrieb Tvrtko Ursulin: > From: Tvrtko Ursulin > > When commit b453e42a6e8b ("drm/amdgpu: Add new placement for preemptible > SG BOs") added a new TTM region it missed to notice the conceptual > imbalance in GART pin size accounting as done in amdgpu_bo_pin/unpin. > > That imbalance leads to such objects getting accounted against the > resource, but are not un-accounted when unpinned. > > Fix by extending the accounting criteria in amdgpu_bo_unpin. > > What also aappears needs fixing is not reporting their size from the > amdgpu_bo_get_memory, which is used to implement fdinfo stats, so they are > not mixed with the regular userspace created and driver owned objects. > > And also amdgpu_bo_print_info for debugfs reporting. > > Note that the patch depends on the previous one which broke down the > relevant checks from the domain based to placement based. > > Signed-off-by: Tvrtko Ursulin > Fixes: b453e42a6e8b ("drm/amdgpu: Add new placement for preemptible SG BOs") > Cc: Felix Kuehling > Cc: Christian König > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > index fb984669fc3a..5a2bbc793953 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > @@ -1032,7 +1032,8 @@ void amdgpu_bo_unpin(struct amdgpu_bo *bo) > atomic64_sub(amdgpu_bo_size(bo), &adev->vram_pin_size); > atomic64_sub(amdgpu_vram_mgr_bo_visible_size(bo), > &adev->visible_pin_size); > - } else if (bo->tbo.resource->mem_type == TTM_PL_TT) { > + } else if (bo->tbo.resource->mem_type == TTM_PL_TT || > + bo->tbo.resource->mem_type == AMDGPU_PL_PREEMPT) { Good catch, but please separate that one from the other changes since we probably want to backport it. > atomic64_sub(amdgpu_bo_size(bo), &adev->gart_pin_size); > } > > @@ -1298,7 +1299,6 @@ void amdgpu_bo_get_memory(struct amdgpu_bo *bo, > stats->vram_shared += size; > break; > case TTM_PL_TT: > - case AMDGPU_PL_PREEMPT: > stats->gtt += size; > if (shared) > stats->gtt_shared += size; > @@ -1599,7 +1599,6 @@ u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m) > placement = "VRAM"; > break; > case TTM_PL_TT: > - case AMDGPU_PL_PREEMPT: Yeah, that makes sense as well. But we need a case for AMDGPU_PL_PREEMPT here as well then. Regards, Christian. > placement = "GTT"; > break; > case TTM_PL_SYSTEM: