From: "Lazar, Lijo" <lijo.lazar@amd.com>
To: Darren Powell <darren.powell@amd.com>, amd-gfx@lists.freedesktop.org
Cc: Le.Ma@amd.com, kevin1.wang@amd.com, kenneth.feng@amd.com,
evan.quan@amd.com
Subject: Re: [PATCH v1 1/2] amdgpu/pm: Fix incorrect variable for size of clocks array
Date: Mon, 9 May 2022 10:17:56 +0530 [thread overview]
Message-ID: <c87204db-e32c-0ce4-52d4-c893196183af@amd.com> (raw)
In-Reply-To: <20220509035838.17410-1-darren.powell@amd.com>
On 5/9/2022 9:28 AM, Darren Powell wrote:
> Size of pp_clock_levels_with_latency is PP_MAX_CLOCK_LEVELS, not MAX_NUM_CLOCKS.
> Both are currently defined as 16, modifying in case one value is modified in future
> Changed code in both arcturus and aldabaran.
>
> Also removed unneeded var count, and used min_t function
>
> Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Thanks,
Lijo
> ---
> drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 9 +++++----
> drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 9 +++++----
> 2 files changed, 10 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> index 201563072189..bdd1e1a35a12 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> @@ -573,12 +573,13 @@ static int arcturus_get_clk_table(struct smu_context *smu,
> struct pp_clock_levels_with_latency *clocks,
> struct smu_11_0_dpm_table *dpm_table)
> {
> - int i, count;
> + uint32_t i;
>
> - count = (dpm_table->count > MAX_NUM_CLOCKS) ? MAX_NUM_CLOCKS : dpm_table->count;
> - clocks->num_levels = count;
> + clocks->num_levels = min_t(uint32_t,
> + dpm_table->count,
> + (uint32_t)PP_MAX_CLOCK_LEVELS);
>
> - for (i = 0; i < count; i++) {
> + for (i = 0; i < clocks->num_levels; i++) {
> clocks->data[i].clocks_in_khz =
> dpm_table->dpm_levels[i].value * 1000;
> clocks->data[i].latency_in_us = 0;
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> index 38af648cb857..6a4fca47ae53 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> @@ -549,12 +549,13 @@ static int aldebaran_get_clk_table(struct smu_context *smu,
> struct pp_clock_levels_with_latency *clocks,
> struct smu_13_0_dpm_table *dpm_table)
> {
> - int i, count;
> + uint32_t i;
>
> - count = (dpm_table->count > MAX_NUM_CLOCKS) ? MAX_NUM_CLOCKS : dpm_table->count;
> - clocks->num_levels = count;
> + clocks->num_levels = min_t(uint32_t,
> + dpm_table->count,
> + (uint32_t)PP_MAX_CLOCK_LEVELS);
>
> - for (i = 0; i < count; i++) {
> + for (i = 0; i < clocks->num_levels; i++) {
> clocks->data[i].clocks_in_khz =
> dpm_table->dpm_levels[i].value * 1000;
> clocks->data[i].latency_in_us = 0;
>
> base-commit: 8bb14fbec5ae45c31cbefe217db2418cc683612f
>
prev parent reply other threads:[~2022-05-09 4:48 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-09 3:58 [PATCH v1 1/2] amdgpu/pm: Fix incorrect variable for size of clocks array Darren Powell
2022-05-09 3:58 ` [PATCH v1 2/2] amdgpu/pm: Fix possible array out-of-bounds if SCLK levels != 2 Darren Powell
2022-05-09 4:50 ` Lazar, Lijo
2022-05-10 22:07 ` Powell, Darren
2022-05-09 4:47 ` Lazar, Lijo [this message]
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