Re: [PATCH v3 31/32] drm/amd/display: add plane CTM support

[Harry Wentland <harry.wentland@amd.com>]

On 2023-09-25 15:49, Melissa Wen wrote:
> Map the plane CTM driver-specific property to DC plane, instead of DC
> stream. The remaining steps to program DPP block are already implemented
> on DC shared-code.
> 
> v3:
> - fix comment about plane and CRTC CTMs priorities (Harry)
> 
> Signed-off-by: Melissa Wen <mwen@igalia.com>
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  1 +
>  .../amd/display/amdgpu_dm/amdgpu_dm_color.c   | 25 +++++++++++++++++++
>  2 files changed, 26 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 581afa7c5f8c..e4edd97982a6 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -9714,6 +9714,7 @@ static bool should_reset_plane(struct drm_atomic_state *state,
>  		if (dm_old_other_state->degamma_tf != dm_new_other_state->degamma_tf ||
>  		    dm_old_other_state->degamma_lut != dm_new_other_state->degamma_lut ||
>  		    dm_old_other_state->hdr_mult != dm_new_other_state->hdr_mult ||
> +		    dm_old_other_state->ctm != dm_new_other_state->ctm ||
>  		    dm_old_other_state->shaper_lut != dm_new_other_state->shaper_lut ||
>  		    dm_old_other_state->shaper_tf != dm_new_other_state->shaper_tf ||
>  		    dm_old_other_state->lut3d != dm_new_other_state->lut3d ||
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> index 26338f565574..944dccd483de 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> @@ -1153,6 +1153,8 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
>  				      struct dc_plane_state *dc_plane_state)
>  {
>  	struct amdgpu_device *adev = drm_to_adev(crtc->base.state->dev);
> +	struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane_state);
> +	struct drm_color_ctm *ctm = NULL;
>  	struct dc_color_caps *color_caps = NULL;
>  	bool has_crtc_cm_degamma;
>  	int ret;
> @@ -1204,5 +1206,28 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
>  			return ret;
>  	}
>  
> +	/* Setup CRTC CTM. */
> +	if (dm_plane_state->ctm) {
> +		ctm = (struct drm_color_ctm *)dm_plane_state->ctm->data;
> +		/* DCN2 and older don't support both pre-blending and

nit: formatting this with a newline before the comment and then:

> +		/*
> +		 * DCN2 and older don't support both pre-blending and

would make this more readable.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>

Harry

> +		 * post-blending gamut remap. For this HW family, if we have
> +		 * the plane and CRTC CTMs simultaneously, CRTC CTM takes
> +		 * priority, and we discard plane CTM, as implemented in
> +		 * dcn10_program_gamut_remap(). However, DCN3+ has DPP
> +		 * (pre-blending) and MPC (post-blending) `gamut remap` blocks;
> +		 * therefore, we can program plane and CRTC CTMs together by
> +		 * mapping CRTC CTM to MPC and keeping plane CTM setup at DPP,
> +		 * as it's done by dcn30_program_gamut_remap().
> +		 */
> +		__drm_ctm_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix);
> +
> +		dc_plane_state->gamut_remap_matrix.enable_remap = true;
> +		dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
> +	} else {
> +		/* Bypass CTM. */
> +		dc_plane_state->gamut_remap_matrix.enable_remap = false;
> +		dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
> +	}
> +
>  	return amdgpu_dm_plane_set_color_properties(plane_state, dc_plane_state);
>  }