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[165.204.72.6]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42abefc626fsm49730115e9.31.2024.08.21.23.35.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 21 Aug 2024 23:35:06 -0700 (PDT) Message-ID: Date: Thu, 22 Aug 2024 08:35:04 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 15/17] drm/amdgpu/gfx9: Apply Isolation Enforcement to GFX & Compute rings To: Alex Deucher , amd-gfx@lists.freedesktop.org Cc: Srinivasan Shanmugam , =?UTF-8?Q?Christian_K=C3=B6nig?= References: <20240815000501.1845226-1-alexander.deucher@amd.com> <20240815000501.1845226-16-alexander.deucher@amd.com> Content-Language: en-US From: =?UTF-8?Q?Christian_K=C3=B6nig?= In-Reply-To: <20240815000501.1845226-16-alexander.deucher@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Am 15.08.24 um 02:04 schrieb Alex Deucher: > From: Srinivasan Shanmugam > > This commit applies isolation enforcement to the GFX and Compute rings > in the gfx_v9_0 module. > > The commit sets `amdgpu_gfx_enforce_isolation_ring_begin_use` and > `amdgpu_gfx_enforce_isolation_ring_end_use` as the functions to be > called when a ring begins and ends its use, respectively. > > `amdgpu_gfx_enforce_isolation_ring_begin_use` is called when a ring > begins its use. This function cancels any scheduled > `enforce_isolation_work` and, if necessary, signals the Kernel Fusion > Driver (KFD) to stop the runqueue. > > `amdgpu_gfx_enforce_isolation_ring_end_use` is called when a ring ends > its use. This function schedules `enforce_isolation_work` to be run > after a delay. > > These functions are part of the Enforce Isolation Handler, which > enforces shader isolation on AMD GPUs to prevent data leakage between > different processes. > > Cc: Christian König > Cc: Alex Deucher > Signed-off-by: Srinivasan Shanmugam > Signed-off-by: Alex Deucher > Suggested-by: Christian König > --- > drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > index 3045b8b0796d..21089aadbb7b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > @@ -7470,6 +7470,8 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_gfx = { > .emit_mem_sync = gfx_v9_0_emit_mem_sync, > .reset = gfx_v9_0_reset_kgq, > .emit_cleaner_shader = gfx_v9_0_ring_emit_cleaner_shader, > + .begin_use = amdgpu_gfx_enforce_isolation_ring_begin_use, > + .end_use = amdgpu_gfx_enforce_isolation_ring_end_use, Does it make sense to have that for the MCBP ring as well? Christian. > }; > > static const struct amdgpu_ring_funcs gfx_v9_0_sw_ring_funcs_gfx = { > @@ -7528,6 +7530,8 @@ static const struct amdgpu_ring_funcs gfx_v9_0_sw_ring_funcs_gfx = { > .patch_de = gfx_v9_0_ring_patch_de_meta, > .patch_ce = gfx_v9_0_ring_patch_ce_meta, > .emit_cleaner_shader = gfx_v9_0_ring_emit_cleaner_shader, > + .begin_use = amdgpu_gfx_enforce_isolation_ring_begin_use, > + .end_use = amdgpu_gfx_enforce_isolation_ring_end_use, > }; > > static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_compute = { > @@ -7569,6 +7573,8 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_compute = { > .emit_wave_limit = gfx_v9_0_emit_wave_limit, > .reset = gfx_v9_0_reset_kcq, > .emit_cleaner_shader = gfx_v9_0_ring_emit_cleaner_shader, > + .begin_use = amdgpu_gfx_enforce_isolation_ring_begin_use, > + .end_use = amdgpu_gfx_enforce_isolation_ring_end_use, > }; > > static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_kiq = {